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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 02:43:03 +07:00
drm/i915: Pass intel_context to intel_context_pin_lock()
Move the intel_context_instance() to the caller so that we can decouple ourselves from one context instance per engine. v2: Rename pin_lock() to lock_pinned(), hopefully that is clearer. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190426163336.15906-5-chris@chris-wilson.co.uk
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1b1ae40721
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6b736de574
@ -128,32 +128,6 @@ intel_context_instance(struct i915_gem_context *ctx,
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return intel_context_get(pos);
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}
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struct intel_context *
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intel_context_pin_lock(struct i915_gem_context *ctx,
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struct intel_engine_cs *engine)
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__acquires(ce->pin_mutex)
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{
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struct intel_context *ce;
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ce = intel_context_instance(ctx, engine);
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if (IS_ERR(ce))
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return ce;
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if (mutex_lock_interruptible(&ce->pin_mutex)) {
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intel_context_put(ce);
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return ERR_PTR(-EINTR);
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}
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return ce;
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}
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void intel_context_pin_unlock(struct intel_context *ce)
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__releases(ce->pin_mutex)
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{
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mutex_unlock(&ce->pin_mutex);
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intel_context_put(ce);
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}
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int __intel_context_do_pin(struct intel_context *ce)
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{
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int err;
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@ -31,25 +31,45 @@ intel_context_lookup(struct i915_gem_context *ctx,
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struct intel_engine_cs *engine);
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/**
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* intel_context_pin_lock - Stablises the 'pinned' status of the HW context
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* @ctx - the parent GEM context
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* @engine - the target HW engine
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* intel_context_lock_pinned - Stablises the 'pinned' status of the HW context
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* @ce - the context
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*
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* Acquire a lock on the pinned status of the HW context, such that the context
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* can neither be bound to the GPU or unbound whilst the lock is held, i.e.
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* intel_context_is_pinned() remains stable.
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*/
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struct intel_context *
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intel_context_pin_lock(struct i915_gem_context *ctx,
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struct intel_engine_cs *engine);
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static inline int intel_context_lock_pinned(struct intel_context *ce)
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__acquires(ce->pin_mutex)
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{
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return mutex_lock_interruptible(&ce->pin_mutex);
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}
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/**
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* intel_context_is_pinned - Reports the 'pinned' status
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* @ce - the context
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*
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* While in use by the GPU, the context, along with its ring and page
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* tables is pinned into memory and the GTT.
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*
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* Returns: true if the context is currently pinned for use by the GPU.
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*/
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static inline bool
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intel_context_is_pinned(struct intel_context *ce)
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{
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return atomic_read(&ce->pin_count);
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}
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void intel_context_pin_unlock(struct intel_context *ce);
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/**
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* intel_context_unlock_pinned - Releases the earlier locking of 'pinned' status
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* @ce - the context
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*
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* Releases the lock earlier acquired by intel_context_unlock_pinned().
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*/
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static inline void intel_context_unlock_pinned(struct intel_context *ce)
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__releases(ce->pin_mutex)
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{
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mutex_unlock(&ce->pin_mutex);
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}
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struct intel_context *
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__intel_context_insert(struct i915_gem_context *ctx,
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@ -141,6 +141,18 @@ static void lut_close(struct i915_gem_context *ctx)
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rcu_read_unlock();
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}
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static struct intel_context *
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lookup_user_engine(struct i915_gem_context *ctx, u16 class, u16 instance)
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{
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struct intel_engine_cs *engine;
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engine = intel_engine_lookup_user(ctx->i915, class, instance);
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if (!engine)
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return ERR_PTR(-EINVAL);
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return intel_context_instance(ctx, engine);
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}
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static inline int new_hw_id(struct drm_i915_private *i915, gfp_t gfp)
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{
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unsigned int max;
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@ -1132,19 +1144,17 @@ gen8_modify_rpcs(struct intel_context *ce, struct intel_sseu sseu)
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}
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static int
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__i915_gem_context_reconfigure_sseu(struct i915_gem_context *ctx,
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struct intel_engine_cs *engine,
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struct intel_sseu sseu)
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__intel_context_reconfigure_sseu(struct intel_context *ce,
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struct intel_sseu sseu)
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{
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struct intel_context *ce;
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int ret = 0;
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int ret;
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GEM_BUG_ON(INTEL_GEN(ctx->i915) < 8);
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GEM_BUG_ON(engine->id != RCS0);
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GEM_BUG_ON(INTEL_GEN(ce->gem_context->i915) < 8);
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GEM_BUG_ON(ce->engine->id != RCS0);
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ce = intel_context_pin_lock(ctx, engine);
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if (IS_ERR(ce))
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return PTR_ERR(ce);
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ret = intel_context_lock_pinned(ce);
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if (ret)
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return ret;
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/* Nothing to do if unmodified. */
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if (!memcmp(&ce->sseu, &sseu, sizeof(sseu)))
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@ -1155,24 +1165,23 @@ __i915_gem_context_reconfigure_sseu(struct i915_gem_context *ctx,
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ce->sseu = sseu;
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unlock:
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intel_context_pin_unlock(ce);
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intel_context_unlock_pinned(ce);
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return ret;
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}
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static int
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i915_gem_context_reconfigure_sseu(struct i915_gem_context *ctx,
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struct intel_engine_cs *engine,
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struct intel_sseu sseu)
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intel_context_reconfigure_sseu(struct intel_context *ce, struct intel_sseu sseu)
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{
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struct drm_i915_private *i915 = ce->gem_context->i915;
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int ret;
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ret = mutex_lock_interruptible(&ctx->i915->drm.struct_mutex);
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ret = mutex_lock_interruptible(&i915->drm.struct_mutex);
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if (ret)
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return ret;
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ret = __i915_gem_context_reconfigure_sseu(ctx, engine, sseu);
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ret = __intel_context_reconfigure_sseu(ce, sseu);
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mutex_unlock(&ctx->i915->drm.struct_mutex);
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mutex_unlock(&i915->drm.struct_mutex);
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return ret;
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}
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@ -1280,7 +1289,7 @@ static int set_sseu(struct i915_gem_context *ctx,
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{
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struct drm_i915_private *i915 = ctx->i915;
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struct drm_i915_gem_context_param_sseu user_sseu;
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struct intel_engine_cs *engine;
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struct intel_context *ce;
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struct intel_sseu sseu;
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int ret;
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@ -1297,27 +1306,31 @@ static int set_sseu(struct i915_gem_context *ctx,
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if (user_sseu.flags || user_sseu.rsvd)
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return -EINVAL;
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engine = intel_engine_lookup_user(i915,
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user_sseu.engine.engine_class,
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user_sseu.engine.engine_instance);
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if (!engine)
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return -EINVAL;
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ce = lookup_user_engine(ctx,
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user_sseu.engine.engine_class,
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user_sseu.engine.engine_instance);
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if (IS_ERR(ce))
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return PTR_ERR(ce);
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/* Only render engine supports RPCS configuration. */
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if (engine->class != RENDER_CLASS)
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return -ENODEV;
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if (ce->engine->class != RENDER_CLASS) {
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ret = -ENODEV;
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goto out_ce;
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}
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ret = user_to_context_sseu(i915, &user_sseu, &sseu);
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if (ret)
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return ret;
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goto out_ce;
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ret = i915_gem_context_reconfigure_sseu(ctx, engine, sseu);
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ret = intel_context_reconfigure_sseu(ce, sseu);
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if (ret)
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return ret;
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goto out_ce;
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args->size = sizeof(user_sseu);
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return 0;
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out_ce:
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intel_context_put(ce);
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return ret;
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}
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static int ctx_setparam(struct drm_i915_file_private *fpriv,
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@ -1522,8 +1535,8 @@ static int get_sseu(struct i915_gem_context *ctx,
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struct drm_i915_gem_context_param *args)
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{
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struct drm_i915_gem_context_param_sseu user_sseu;
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struct intel_engine_cs *engine;
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struct intel_context *ce;
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int err;
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if (args->size == 0)
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goto out;
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@ -1537,22 +1550,25 @@ static int get_sseu(struct i915_gem_context *ctx,
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if (user_sseu.flags || user_sseu.rsvd)
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return -EINVAL;
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engine = intel_engine_lookup_user(ctx->i915,
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user_sseu.engine.engine_class,
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user_sseu.engine.engine_instance);
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if (!engine)
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return -EINVAL;
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ce = intel_context_pin_lock(ctx, engine); /* serialises with set_sseu */
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ce = lookup_user_engine(ctx,
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user_sseu.engine.engine_class,
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user_sseu.engine.engine_instance);
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if (IS_ERR(ce))
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return PTR_ERR(ce);
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err = intel_context_lock_pinned(ce); /* serialises with set_sseu */
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if (err) {
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intel_context_put(ce);
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return err;
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}
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user_sseu.slice_mask = ce->sseu.slice_mask;
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user_sseu.subslice_mask = ce->sseu.subslice_mask;
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user_sseu.min_eus_per_subslice = ce->sseu.min_eus_per_subslice;
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user_sseu.max_eus_per_subslice = ce->sseu.max_eus_per_subslice;
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intel_context_pin_unlock(ce);
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intel_context_unlock_pinned(ce);
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intel_context_put(ce);
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if (copy_to_user(u64_to_user_ptr(args->value), &user_sseu,
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sizeof(user_sseu)))
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@ -1017,7 +1017,7 @@ __sseu_test(struct drm_i915_private *i915,
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if (ret)
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return ret;
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ret = __i915_gem_context_reconfigure_sseu(ce->gem_context, ce->engine, sseu);
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ret = __intel_context_reconfigure_sseu(ce, sseu);
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if (ret)
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goto out_spin;
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