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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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mtd: rawnand: marvell: Rename ->ecc_clk into ->core_clk
The core clock field was badly named ->ecc_clk which might lead to some confusion. Rename it ->core_clk. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
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@ -307,7 +307,7 @@ struct marvell_nfc_caps {
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* @controller: Base controller structure
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* @dev: Parent device (used to print error messages)
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* @regs: NAND controller registers
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* @ecc_clk: ECC block clock, two times the NAND controller clock
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* @core_clk: Core clock
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* @reg_clk: Regiters clock
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* @complete: Completion object to wait for NAND controller events
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* @assigned_cs: Bitmask describing already assigned CS lines
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@ -321,7 +321,7 @@ struct marvell_nfc {
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struct nand_hw_control controller;
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struct device *dev;
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void __iomem *regs;
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struct clk *ecc_clk;
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struct clk *core_clk;
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struct clk *reg_clk;
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struct completion complete;
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unsigned long assigned_cs;
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@ -2193,7 +2193,7 @@ static int marvell_nfc_setup_data_interface(struct mtd_info *mtd, int chipnr,
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struct nand_chip *chip = mtd_to_nand(mtd);
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struct marvell_nand_chip *marvell_nand = to_marvell_nand(chip);
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struct marvell_nfc *nfc = to_marvell_nfc(chip->controller);
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unsigned int period_ns = 1000000000 / clk_get_rate(nfc->ecc_clk) * 2;
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unsigned int period_ns = 1000000000 / clk_get_rate(nfc->core_clk) * 2;
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const struct nand_sdr_timings *sdr;
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struct marvell_nfc_timings nfc_tmg;
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int read_delay;
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@ -2759,16 +2759,16 @@ static int marvell_nfc_probe(struct platform_device *pdev)
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return irq;
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}
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nfc->ecc_clk = devm_clk_get(&pdev->dev, "core");
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nfc->core_clk = devm_clk_get(&pdev->dev, "core");
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/* Managed the legacy case (when the first clock was not named) */
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if (nfc->ecc_clk == ERR_PTR(-ENOENT))
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nfc->ecc_clk = devm_clk_get(&pdev->dev, NULL);
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if (nfc->core_clk == ERR_PTR(-ENOENT))
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nfc->core_clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(nfc->ecc_clk))
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return PTR_ERR(nfc->ecc_clk);
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if (IS_ERR(nfc->core_clk))
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return PTR_ERR(nfc->core_clk);
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ret = clk_prepare_enable(nfc->ecc_clk);
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ret = clk_prepare_enable(nfc->core_clk);
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if (ret)
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return ret;
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@ -2777,10 +2777,10 @@ static int marvell_nfc_probe(struct platform_device *pdev)
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if (!IS_ERR(nfc->reg_clk)) {
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ret = clk_prepare_enable(nfc->reg_clk);
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if (ret)
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goto unprepare_ecc_clk;
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goto unprepare_core_clk;
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} else {
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ret = PTR_ERR(nfc->reg_clk);
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goto unprepare_ecc_clk;
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goto unprepare_core_clk;
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}
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}
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@ -2818,8 +2818,8 @@ static int marvell_nfc_probe(struct platform_device *pdev)
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unprepare_reg_clk:
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clk_disable_unprepare(nfc->reg_clk);
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unprepare_ecc_clk:
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clk_disable_unprepare(nfc->ecc_clk);
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unprepare_core_clk:
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clk_disable_unprepare(nfc->core_clk);
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return ret;
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}
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@ -2836,7 +2836,7 @@ static int marvell_nfc_remove(struct platform_device *pdev)
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}
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clk_disable_unprepare(nfc->reg_clk);
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clk_disable_unprepare(nfc->ecc_clk);
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clk_disable_unprepare(nfc->core_clk);
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return 0;
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}
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