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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 20:47:04 +07:00
ixgbevf: Update q_vector to contain ring pointers instead of bitmaps
For most cases the ixgbevf driver will only ever contain a single Tx and single Rx queue. In order to track that it makes more sense to use a pointer instead of using a bitmap which must be search in order to locate the ring on an adapter index. As such I am changing the code to use pointers and an iterator to access all rings on a given q_vector. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
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3595990a9c
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@ -55,6 +55,7 @@ struct ixgbevf_rx_buffer {
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};
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struct ixgbevf_ring {
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struct ixgbevf_ring *next;
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struct ixgbevf_adapter *adapter; /* backlink */
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void *desc; /* descriptor ring memory */
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dma_addr_t dma; /* phys. address of descriptor ring */
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@ -120,18 +121,23 @@ struct ixgbevf_ring {
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#define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000
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#define IXGBE_TX_FLAGS_VLAN_SHIFT 16
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struct ixgbevf_ring_container {
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struct ixgbevf_ring *ring; /* pointer to linked list of rings */
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u8 count; /* total number of rings in vector */
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u8 itr; /* current ITR setting for ring */
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};
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/* iterator for handling rings in ring container */
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#define ixgbevf_for_each_ring(pos, head) \
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for (pos = (head).ring; pos != NULL; pos = pos->next)
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/* MAX_MSIX_Q_VECTORS of these are allocated,
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* but we only use one per queue-specific vector.
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*/
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struct ixgbevf_q_vector {
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struct ixgbevf_adapter *adapter;
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struct napi_struct napi;
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DECLARE_BITMAP(rxr_idx, MAX_RX_QUEUES); /* Rx ring indices */
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DECLARE_BITMAP(txr_idx, MAX_TX_QUEUES); /* Tx ring indices */
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u8 rxr_count; /* Rx ring count assigned to this vector */
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u8 txr_count; /* Tx ring count assigned to this vector */
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u8 tx_itr;
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u8 rx_itr;
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struct ixgbevf_ring_container rx, tx;
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u32 eitr;
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int v_idx; /* vector index in list */
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};
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@ -526,14 +526,9 @@ static int ixgbevf_clean_rxonly(struct napi_struct *napi, int budget)
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struct ixgbevf_q_vector *q_vector =
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container_of(napi, struct ixgbevf_q_vector, napi);
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struct ixgbevf_adapter *adapter = q_vector->adapter;
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struct ixgbevf_ring *rx_ring = NULL;
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int work_done = 0;
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long r_idx;
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r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
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rx_ring = &(adapter->rx_ring[r_idx]);
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ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
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ixgbevf_clean_rx_irq(q_vector, q_vector->rx.ring, &work_done, budget);
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/* If all Rx work done, exit the polling mode */
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if (work_done < budget) {
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@ -541,7 +536,8 @@ static int ixgbevf_clean_rxonly(struct napi_struct *napi, int budget)
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if (adapter->itr_setting & 1)
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ixgbevf_set_itr_msix(q_vector);
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if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
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ixgbevf_irq_enable_queues(adapter, rx_ring->v_idx);
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ixgbevf_irq_enable_queues(adapter,
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1 << q_vector->v_idx);
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}
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return work_done;
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@ -560,26 +556,16 @@ static int ixgbevf_clean_rxonly_many(struct napi_struct *napi, int budget)
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struct ixgbevf_q_vector *q_vector =
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container_of(napi, struct ixgbevf_q_vector, napi);
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struct ixgbevf_adapter *adapter = q_vector->adapter;
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struct ixgbevf_ring *rx_ring = NULL;
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int work_done = 0, i;
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long r_idx;
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u64 enable_mask = 0;
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struct ixgbevf_ring *rx_ring;
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int work_done = 0;
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/* attempt to distribute budget to each queue fairly, but don't allow
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* the budget to go below 1 because we'll exit polling */
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budget /= (q_vector->rxr_count ?: 1);
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budget /= (q_vector->rx.count ?: 1);
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budget = max(budget, 1);
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r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
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for (i = 0; i < q_vector->rxr_count; i++) {
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rx_ring = &(adapter->rx_ring[r_idx]);
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ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
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enable_mask |= rx_ring->v_idx;
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r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
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r_idx + 1);
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}
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r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
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rx_ring = &(adapter->rx_ring[r_idx]);
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ixgbevf_for_each_ring(rx_ring, q_vector->rx)
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ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
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/* If all Rx work done, exit the polling mode */
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if (work_done < budget) {
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@ -587,7 +573,8 @@ static int ixgbevf_clean_rxonly_many(struct napi_struct *napi, int budget)
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if (adapter->itr_setting & 1)
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ixgbevf_set_itr_msix(q_vector);
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if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
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ixgbevf_irq_enable_queues(adapter, enable_mask);
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ixgbevf_irq_enable_queues(adapter,
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1 << q_vector->v_idx);
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}
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return work_done;
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@ -605,7 +592,7 @@ static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
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{
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struct ixgbevf_q_vector *q_vector;
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struct ixgbe_hw *hw = &adapter->hw;
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int i, j, q_vectors, v_idx, r_idx;
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int q_vectors, v_idx;
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u32 mask;
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q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
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@ -615,33 +602,19 @@ static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
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* corresponding register.
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*/
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for (v_idx = 0; v_idx < q_vectors; v_idx++) {
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struct ixgbevf_ring *ring;
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q_vector = adapter->q_vector[v_idx];
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/* XXX for_each_set_bit(...) */
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r_idx = find_first_bit(q_vector->rxr_idx,
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adapter->num_rx_queues);
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for (i = 0; i < q_vector->rxr_count; i++) {
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j = adapter->rx_ring[r_idx].reg_idx;
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ixgbevf_set_ivar(adapter, 0, j, v_idx);
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r_idx = find_next_bit(q_vector->rxr_idx,
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adapter->num_rx_queues,
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r_idx + 1);
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}
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r_idx = find_first_bit(q_vector->txr_idx,
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adapter->num_tx_queues);
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ixgbevf_for_each_ring(ring, q_vector->rx)
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ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
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for (i = 0; i < q_vector->txr_count; i++) {
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j = adapter->tx_ring[r_idx].reg_idx;
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ixgbevf_set_ivar(adapter, 1, j, v_idx);
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r_idx = find_next_bit(q_vector->txr_idx,
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adapter->num_tx_queues,
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r_idx + 1);
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}
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ixgbevf_for_each_ring(ring, q_vector->tx)
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ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
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/* if this is a tx only vector halve the interrupt rate */
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if (q_vector->txr_count && !q_vector->rxr_count)
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if (q_vector->tx.ring && !q_vector->rx.ring)
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q_vector->eitr = (adapter->eitr_param >> 1);
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else if (q_vector->rxr_count)
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else if (q_vector->rx.ring)
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/* rx only */
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q_vector->eitr = adapter->eitr_param;
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@ -752,40 +725,32 @@ static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector)
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struct ixgbevf_adapter *adapter = q_vector->adapter;
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u32 new_itr;
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u8 current_itr, ret_itr;
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int i, r_idx, v_idx = q_vector->v_idx;
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int v_idx = q_vector->v_idx;
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struct ixgbevf_ring *rx_ring, *tx_ring;
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r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
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for (i = 0; i < q_vector->txr_count; i++) {
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tx_ring = &(adapter->tx_ring[r_idx]);
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ixgbevf_for_each_ring(tx_ring, q_vector->tx) {
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ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
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q_vector->tx_itr,
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q_vector->tx.itr,
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tx_ring->total_packets,
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tx_ring->total_bytes);
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/* if the result for this queue would decrease interrupt
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* rate for this vector then use that result */
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q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
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q_vector->tx_itr - 1 : ret_itr);
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r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
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r_idx + 1);
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q_vector->tx.itr = ((q_vector->tx.itr > ret_itr) ?
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q_vector->tx.itr - 1 : ret_itr);
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}
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r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
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for (i = 0; i < q_vector->rxr_count; i++) {
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rx_ring = &(adapter->rx_ring[r_idx]);
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ixgbevf_for_each_ring(rx_ring, q_vector->rx) {
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ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
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q_vector->rx_itr,
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q_vector->rx.itr,
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rx_ring->total_packets,
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rx_ring->total_bytes);
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/* if the result for this queue would decrease interrupt
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* rate for this vector then use that result */
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q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
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q_vector->rx_itr - 1 : ret_itr);
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r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
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r_idx + 1);
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q_vector->rx.itr = ((q_vector->rx.itr > ret_itr) ?
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q_vector->rx.itr - 1 : ret_itr);
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}
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current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
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current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
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switch (current_itr) {
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/* counts and packets in update_itr are dependent on these numbers */
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@ -861,19 +826,14 @@ static irqreturn_t ixgbevf_msix_clean_tx(int irq, void *data)
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struct ixgbevf_q_vector *q_vector = data;
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struct ixgbevf_adapter *adapter = q_vector->adapter;
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struct ixgbevf_ring *tx_ring;
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int i, r_idx;
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if (!q_vector->txr_count)
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if (!q_vector->tx.ring)
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return IRQ_HANDLED;
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r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
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for (i = 0; i < q_vector->txr_count; i++) {
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tx_ring = &(adapter->tx_ring[r_idx]);
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ixgbevf_for_each_ring(tx_ring, q_vector->tx) {
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tx_ring->total_bytes = 0;
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tx_ring->total_packets = 0;
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ixgbevf_clean_tx_irq(adapter, tx_ring);
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r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
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r_idx + 1);
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}
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if (adapter->itr_setting & 1)
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@ -893,25 +853,17 @@ static irqreturn_t ixgbevf_msix_clean_rx(int irq, void *data)
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struct ixgbevf_adapter *adapter = q_vector->adapter;
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struct ixgbe_hw *hw = &adapter->hw;
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struct ixgbevf_ring *rx_ring;
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int r_idx;
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int i;
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r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
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for (i = 0; i < q_vector->rxr_count; i++) {
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rx_ring = &(adapter->rx_ring[r_idx]);
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ixgbevf_for_each_ring(rx_ring, q_vector->rx) {
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rx_ring->total_bytes = 0;
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rx_ring->total_packets = 0;
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r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
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r_idx + 1);
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}
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if (!q_vector->rxr_count)
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if (!q_vector->rx.ring)
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return IRQ_HANDLED;
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r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
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rx_ring = &(adapter->rx_ring[r_idx]);
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/* disable interrupts on this vector only */
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IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, rx_ring->v_idx);
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IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, 1 << q_vector->v_idx);
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napi_schedule(&q_vector->napi);
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@ -931,8 +883,9 @@ static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
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{
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struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
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set_bit(r_idx, q_vector->rxr_idx);
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q_vector->rxr_count++;
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a->rx_ring[r_idx].next = q_vector->rx.ring;
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q_vector->rx.ring = &a->rx_ring[r_idx];
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q_vector->rx.count++;
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a->rx_ring[r_idx].v_idx = 1 << v_idx;
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}
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@ -941,8 +894,9 @@ static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
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{
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struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
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set_bit(t_idx, q_vector->txr_idx);
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q_vector->txr_count++;
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a->tx_ring[t_idx].next = q_vector->tx.ring;
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q_vector->tx.ring = &a->tx_ring[t_idx];
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q_vector->tx.count++;
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a->tx_ring[t_idx].v_idx = 1 << v_idx;
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}
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@ -1026,10 +980,10 @@ static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
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/* Decrement for Other and TCP Timer vectors */
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q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
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#define SET_HANDLER(_v) (((_v)->rxr_count && (_v)->txr_count) \
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? &ixgbevf_msix_clean_many : \
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(_v)->rxr_count ? &ixgbevf_msix_clean_rx : \
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(_v)->txr_count ? &ixgbevf_msix_clean_tx : \
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#define SET_HANDLER(_v) (((_v)->rx.ring && (_v)->tx.ring) \
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? &ixgbevf_msix_clean_many : \
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(_v)->rx.ring ? &ixgbevf_msix_clean_rx : \
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(_v)->tx.ring ? &ixgbevf_msix_clean_tx : \
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NULL)
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for (vector = 0; vector < q_vectors; vector++) {
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handler = SET_HANDLER(adapter->q_vector[vector]);
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@ -1085,10 +1039,10 @@ static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
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for (i = 0; i < q_vectors; i++) {
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struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
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bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
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bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
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q_vector->rxr_count = 0;
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q_vector->txr_count = 0;
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q_vector->rx.ring = NULL;
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q_vector->tx.ring = NULL;
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q_vector->rx.count = 0;
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q_vector->tx.count = 0;
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q_vector->eitr = adapter->eitr_param;
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}
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}
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@ -1365,10 +1319,10 @@ static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
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for (q_idx = 0; q_idx < q_vectors; q_idx++) {
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struct napi_struct *napi;
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q_vector = adapter->q_vector[q_idx];
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if (!q_vector->rxr_count)
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if (!q_vector->rx.ring)
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continue;
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napi = &q_vector->napi;
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if (q_vector->rxr_count > 1)
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if (q_vector->rx.count > 1)
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napi->poll = &ixgbevf_clean_rxonly_many;
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napi_enable(napi);
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@ -1383,7 +1337,7 @@ static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
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for (q_idx = 0; q_idx < q_vectors; q_idx++) {
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q_vector = adapter->q_vector[q_idx];
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if (!q_vector->rxr_count)
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if (!q_vector->rx.ring)
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continue;
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napi_disable(&q_vector->napi);
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}
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@ -2144,7 +2098,7 @@ static void ixgbevf_watchdog(unsigned long data)
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/* get one bit for every active tx/rx interrupt vector */
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for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
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struct ixgbevf_q_vector *qv = adapter->q_vector[i];
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if (qv->rxr_count || qv->txr_count)
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if (qv->rx.ring || qv->tx.ring)
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eics |= (1 << i);
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}
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