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arm64: dts: imx8qxp: enable scu general irq channel
On i.MX8QXP, SCU uses MU1 general interrupt channel #3 to notify user for IRQs of RTC alarm, thermal alarm and WDOG etc., mailbox RX doorbell mode is used for this function, this patch adds support for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -21,6 +21,7 @@ aliases {
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mmc1 = &usdhc2;
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mmc2 = &usdhc3;
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serial0 = &adma_lpuart0;
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mu1 = &lsio_mu1;
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};
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cpus {
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@ -117,7 +118,8 @@ psci {
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scu {
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compatible = "fsl,imx-scu";
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mbox-names = "tx0", "tx1", "tx2", "tx3",
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"rx0", "rx1", "rx2", "rx3";
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"rx0", "rx1", "rx2", "rx3",
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"gip3";
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mboxes = <&lsio_mu1 0 0
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&lsio_mu1 0 1
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&lsio_mu1 0 2
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@ -125,7 +127,8 @@ &lsio_mu1 0 3
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&lsio_mu1 1 0
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&lsio_mu1 1 1
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&lsio_mu1 1 2
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&lsio_mu1 1 3>;
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&lsio_mu1 1 3
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&lsio_mu1 3 3>;
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clk: clock-controller {
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compatible = "fsl,imx8qxp-clk";
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