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Pin control fixes for the v3.12 series:
- Various build warning fixes. - Correct the S5P pin count. - Handle BIAS_DEFAULT properly in the Palmas driver. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJSS9t4AAoJEEEQszewGV1ztdsP/12dV/JktKcqTRRijr2cYSQc +pfQ2rMBlogjTfJSOOqAeaPKA/qDLlG/WbVZW6bH87CMojsZHSbOxboqcPiqshmk 9x+8BEcHxqjJkFcR2tPgVj/6S1ObFHD6fQ0Lv2m4MicfHpe6cUOIGevihfBV2mtR 3n0u+uxPhZhvBYrVbaPT6kwCcLKmsWwAT7KKMXVCD7I5Wx3PsrfvEW08lw8hv/n5 5f9IntvYga3SaLigLnHEeXVr9rXZqi4wl1FwAt3OXcT30wMIMaDxMKi990FCfech K5PdW+wkN6TO5cFS/PwCqWHMXpASfeLCU0Iy9S1RU4XZUGL782QUyCspj+hWuaRh uG9BSweF4iWRMzrHnNWIRIuNMMOArIr3XkB1xZ14dwBjZzeqBIXumiIV1XyWMcFe 48Tvu3czCXYoMqhNtIPIsWgQafONG7f0sFoGjMqoQJ8uNy2ipTq3aKaoH620r//a AtCGfs/LdG/6Z/W5YKTjKzyyKoFWHhkoPzB+TVHrA4WZR5xunLol8EVWLdMUTkB+ 8Ujxw7jpy2xQye59lg9bgaG5yroteot7O09vN6TEzMj9b9/0SrzpJaE/JsqpUlCB r8veQuQboHqX/e3Uui4lME6SdA0UgFzBUEhX39raL6MKDuqsgX2uQOKdNS/KMNgB iUUMr8mtN/jhI7FEdYn8 =k2j2 -----END PGP SIGNATURE----- Merge tag 'pinctrl-v3.12-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: - Various build warning fixes. - Correct the S5P pin count. - Handle BIAS_DEFAULT properly in the Palmas driver. * tag 'pinctrl-v3.12-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: palmas: do not abort pin configuration for BIAS_DEFAULT pinctrl: Correct number of pins for s5pv210 pinctrl: remove an unnecessary cast pinctrl: fix pinconf_dbg_config_write return type pinctrl: tegra114: Remove MODULE_ALIAS
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commit
6acf9902a2
@ -490,7 +490,7 @@ static int pinconf_dbg_config_print(struct seq_file *s, void *d)
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* <devicename> <state> <pinname> are values that should match the pinctrl-maps
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* <newvalue> reflects the new config and is driver dependant
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*/
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static int pinconf_dbg_config_write(struct file *file,
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static ssize_t pinconf_dbg_config_write(struct file *file,
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const char __user *user_buf, size_t count, loff_t *ppos)
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{
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struct pinctrl_maps *maps_node;
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@ -508,7 +508,7 @@ static int pinconf_dbg_config_write(struct file *file,
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int i;
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/* Get userspace string and assure termination */
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buf_size = min(count, (size_t)(sizeof(buf)-1));
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buf_size = min(count, sizeof(buf) - 1);
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if (copy_from_user(buf, user_buf, buf_size))
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return -EFAULT;
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buf[buf_size] = 0;
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@ -663,18 +663,18 @@ static void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata)
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/* pin banks of s5pv210 pin-controller */
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static struct samsung_pin_bank s5pv210_pin_bank[] = {
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EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
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EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04),
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EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpa1", 0x04),
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EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08),
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EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpc0", 0x0c),
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EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpc1", 0x10),
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EXYNOS_PIN_BANK_EINTG(4, 0x0a0, "gpd0", 0x14),
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EXYNOS_PIN_BANK_EINTG(4, 0x0c0, "gpd1", 0x18),
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EXYNOS_PIN_BANK_EINTG(5, 0x0e0, "gpe0", 0x1c),
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EXYNOS_PIN_BANK_EINTG(8, 0x100, "gpe1", 0x20),
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EXYNOS_PIN_BANK_EINTG(6, 0x120, "gpf0", 0x24),
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EXYNOS_PIN_BANK_EINTG(6, 0x0c0, "gpd1", 0x18),
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EXYNOS_PIN_BANK_EINTG(8, 0x0e0, "gpe0", 0x1c),
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EXYNOS_PIN_BANK_EINTG(5, 0x100, "gpe1", 0x20),
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EXYNOS_PIN_BANK_EINTG(8, 0x120, "gpf0", 0x24),
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EXYNOS_PIN_BANK_EINTG(8, 0x140, "gpf1", 0x28),
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EXYNOS_PIN_BANK_EINTG(8, 0x160, "gpf2", 0x2c),
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EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpf3", 0x30),
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EXYNOS_PIN_BANK_EINTG(6, 0x180, "gpf3", 0x30),
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EXYNOS_PIN_BANK_EINTG(7, 0x1a0, "gpg0", 0x34),
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EXYNOS_PIN_BANK_EINTG(7, 0x1c0, "gpg1", 0x38),
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EXYNOS_PIN_BANK_EINTG(7, 0x1e0, "gpg2", 0x3c),
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@ -891,9 +891,10 @@ static int palmas_pinconf_set(struct pinctrl_dev *pctldev,
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param = pinconf_to_config_param(configs[i]);
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param_val = pinconf_to_config_argument(configs[i]);
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if (param == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
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continue;
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switch (param) {
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case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
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return 0;
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case PIN_CONFIG_BIAS_DISABLE:
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case PIN_CONFIG_BIAS_PULL_UP:
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case PIN_CONFIG_BIAS_PULL_DOWN:
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@ -3,7 +3,7 @@
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*
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* Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
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*
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* Arthur: Pritesh Raithatha <praithatha@nvidia.com>
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* Author: Pritesh Raithatha <praithatha@nvidia.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -2763,7 +2763,6 @@ static struct platform_driver tegra114_pinctrl_driver = {
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};
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module_platform_driver(tegra114_pinctrl_driver);
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MODULE_ALIAS("platform:tegra114-pinctrl");
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MODULE_AUTHOR("Pritesh Raithatha <praithatha@nvidia.com>");
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MODULE_DESCRIPTION("NVIDIA Tegra114 pincontrol driver");
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MODULE_DESCRIPTION("NVIDIA Tegra114 pinctrl driver");
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MODULE_LICENSE("GPL v2");
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