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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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linux-can-fixes-for-3.15-20140424
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlNZf5EACgkQjTAFq1RaXHPFhACghgdQaxG++36VEhtToY+H8o2x 3UUAniZ+DbwtSapriPekjVKRC7VuQFsD =N5FA -----END PGP SIGNATURE----- Merge tag 'linux-can-fixes-for-3.15-20140424' of git://gitorious.org/linux-can/linux-can Marc Kleine-Budde says: ==================== this is a pull request for net/master, for the v3.15 release cycle, consisting of 26 patches. Thomas Gleixner contributes 21 patches for the c_can driver, which address several shortcomings in the driver like hardware initialisation, concurrency, message ordering and poor performance. Two patches Oliver Hartkopp, one adds a missing lock to the sja1000_isa driver, the other one fixes the return value in the generic bit time configuration function. And finally a patch by Alexander Stein, that fixes the slcan driver to use the correct spinlock variant. To make it 26 patches, Wolfgang Grandegger patch for the c_can_pci driver, which enables the bus master only for MSI and a patch by Wolfram Sang, which converts the 'instance' in the c_can driver to the proper type. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
69d268b772
@ -14,6 +14,13 @@ config CAN_C_CAN_PLATFORM
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SPEAr1310 and SPEAr320 evaluation boards & TI (www.ti.com)
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boards like am335x, dm814x, dm813x and dm811x.
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config CAN_C_CAN_STRICT_FRAME_ORDERING
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bool "Force a strict RX CAN frame order (may cause frame loss)"
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---help---
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The RX split buffer prevents packet reordering but can cause packet
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loss. Only enable this option when you accept to lose CAN frames
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in favour of getting the received CAN frames in the correct order.
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config CAN_C_CAN_PCI
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tristate "Generic PCI Bus based C_CAN/D_CAN driver"
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depends on PCI
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File diff suppressed because it is too large
Load Diff
@ -22,14 +22,6 @@
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#ifndef C_CAN_H
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#define C_CAN_H
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/*
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* IFx register masks:
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* allow easy operation on 16-bit registers when the
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* argument is 32-bit instead
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*/
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#define IFX_WRITE_LOW_16BIT(x) ((x) & 0xFFFF)
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#define IFX_WRITE_HIGH_16BIT(x) (((x) & 0xFFFF0000) >> 16)
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/* message object split */
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#define C_CAN_NO_OF_OBJECTS 32
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#define C_CAN_MSG_OBJ_RX_NUM 16
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@ -45,8 +37,6 @@
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#define C_CAN_MSG_OBJ_RX_SPLIT 9
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#define C_CAN_MSG_RX_LOW_LAST (C_CAN_MSG_OBJ_RX_SPLIT - 1)
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#define C_CAN_NEXT_MSG_OBJ_MASK (C_CAN_MSG_OBJ_TX_NUM - 1)
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#define RECEIVE_OBJECT_BITS 0x0000ffff
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enum reg {
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@ -183,23 +173,20 @@ struct c_can_priv {
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struct napi_struct napi;
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struct net_device *dev;
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struct device *device;
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spinlock_t xmit_lock;
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int tx_object;
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int current_status;
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atomic_t tx_active;
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unsigned long tx_dir;
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int last_status;
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u16 (*read_reg) (struct c_can_priv *priv, enum reg index);
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void (*write_reg) (struct c_can_priv *priv, enum reg index, u16 val);
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void __iomem *base;
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const u16 *regs;
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unsigned long irq_flags; /* for request_irq() */
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unsigned int tx_next;
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unsigned int tx_echo;
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void *priv; /* for board-specific data */
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u16 irqstatus;
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enum c_can_dev_id type;
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u32 __iomem *raminit_ctrlreg;
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unsigned int instance;
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int instance;
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void (*raminit) (const struct c_can_priv *priv, bool enable);
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u32 comm_rcv_high;
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u32 rxmasked;
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u32 dlc[C_CAN_MSG_OBJ_TX_NUM];
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};
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@ -84,8 +84,11 @@ static int c_can_pci_probe(struct pci_dev *pdev,
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goto out_disable_device;
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}
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pci_set_master(pdev);
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pci_enable_msi(pdev);
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ret = pci_enable_msi(pdev);
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if (!ret) {
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dev_info(&pdev->dev, "MSI enabled\n");
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pci_set_master(pdev);
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}
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addr = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
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if (!addr) {
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@ -132,6 +135,8 @@ static int c_can_pci_probe(struct pci_dev *pdev,
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goto out_free_c_can;
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}
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priv->type = c_can_pci_data->type;
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/* Configure access to registers */
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switch (c_can_pci_data->reg_align) {
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case C_CAN_REG_ALIGN_32:
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@ -222,7 +222,7 @@ static int c_can_plat_probe(struct platform_device *pdev)
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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priv->raminit_ctrlreg = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(priv->raminit_ctrlreg) || (int)priv->instance < 0)
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if (IS_ERR(priv->raminit_ctrlreg) || priv->instance < 0)
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dev_info(&pdev->dev, "control memory is not used for raminit\n");
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else
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priv->raminit = c_can_hw_raminit;
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@ -256,7 +256,7 @@ static int can_get_bittiming(struct net_device *dev, struct can_bittiming *bt,
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/* Check if the CAN device has bit-timing parameters */
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if (!btc)
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return -ENOTSUPP;
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return -EOPNOTSUPP;
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/*
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* Depending on the given can_bittiming parameter structure the CAN
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@ -46,6 +46,7 @@ static int clk[MAXDEV];
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static unsigned char cdr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
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static unsigned char ocr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
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static int indirect[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1};
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static spinlock_t indirect_lock[MAXDEV]; /* lock for indirect access mode */
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module_param_array(port, ulong, NULL, S_IRUGO);
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MODULE_PARM_DESC(port, "I/O port number");
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@ -101,19 +102,26 @@ static void sja1000_isa_port_write_reg(const struct sja1000_priv *priv,
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static u8 sja1000_isa_port_read_reg_indirect(const struct sja1000_priv *priv,
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int reg)
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{
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unsigned long base = (unsigned long)priv->reg_base;
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unsigned long flags, base = (unsigned long)priv->reg_base;
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u8 readval;
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spin_lock_irqsave(&indirect_lock[priv->dev->dev_id], flags);
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outb(reg, base);
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return inb(base + 1);
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readval = inb(base + 1);
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spin_unlock_irqrestore(&indirect_lock[priv->dev->dev_id], flags);
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return readval;
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}
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static void sja1000_isa_port_write_reg_indirect(const struct sja1000_priv *priv,
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int reg, u8 val)
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{
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unsigned long base = (unsigned long)priv->reg_base;
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unsigned long flags, base = (unsigned long)priv->reg_base;
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spin_lock_irqsave(&indirect_lock[priv->dev->dev_id], flags);
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outb(reg, base);
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outb(val, base + 1);
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spin_unlock_irqrestore(&indirect_lock[priv->dev->dev_id], flags);
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}
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static int sja1000_isa_probe(struct platform_device *pdev)
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@ -169,6 +177,7 @@ static int sja1000_isa_probe(struct platform_device *pdev)
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if (iosize == SJA1000_IOSIZE_INDIRECT) {
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priv->read_reg = sja1000_isa_port_read_reg_indirect;
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priv->write_reg = sja1000_isa_port_write_reg_indirect;
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spin_lock_init(&indirect_lock[idx]);
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} else {
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priv->read_reg = sja1000_isa_port_read_reg;
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priv->write_reg = sja1000_isa_port_write_reg;
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@ -198,6 +207,7 @@ static int sja1000_isa_probe(struct platform_device *pdev)
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platform_set_drvdata(pdev, dev);
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SET_NETDEV_DEV(dev, &pdev->dev);
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dev->dev_id = idx;
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err = register_sja1000dev(dev);
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if (err) {
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@ -322,13 +322,13 @@ static void slcan_write_wakeup(struct tty_struct *tty)
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if (!sl || sl->magic != SLCAN_MAGIC || !netif_running(sl->dev))
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return;
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spin_lock(&sl->lock);
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spin_lock_bh(&sl->lock);
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if (sl->xleft <= 0) {
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/* Now serial buffer is almost free & we can start
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* transmission of another packet */
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sl->dev->stats.tx_packets++;
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clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
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spin_unlock(&sl->lock);
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spin_unlock_bh(&sl->lock);
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netif_wake_queue(sl->dev);
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return;
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}
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@ -336,7 +336,7 @@ static void slcan_write_wakeup(struct tty_struct *tty)
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actual = tty->ops->write(tty, sl->xhead, sl->xleft);
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sl->xleft -= actual;
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sl->xhead += actual;
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spin_unlock(&sl->lock);
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spin_unlock_bh(&sl->lock);
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}
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/* Send a can_frame to a TTY queue. */
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