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spi: spi-fsl-spi: support use of the SPISEL_BOOT signal on MPC8309
The MPC8309 has a dedicated signal, SPISEL_BOOT, usually used as chip select for the flash device from which the bootloader is loaded. It is not an ordinary gpio, but is simply controlled via the SPI_CS register in the system configuration. To allow accessing such a spi slave, we need to teach fsl_spi_cs_control() how to control the SPISEL_BOOT signal. To distinguish the gpio-controlled slaves, continue to have those use chip_select values of 0..ngpios-1, and use chip_select == ngpios for the boot flash. I'm not too happy with all the ifdeffery, but it seems to be necessary for guarding the sysdev/fsl_soc.h and use of get_immrbase() (spi-fsl-lib.c already contains similar ifdeffery). Googling suggests that the MPC8306 is similar, with the SPI_CS register at the same offset. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -18,6 +18,10 @@ Optional properties:
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- gpios : specifies the gpio pins to be used for chipselects.
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The gpios will be referred to as reg = <index> in the SPI child nodes.
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If unspecified, a single SPI device without a chip select can be used.
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- fsl,spisel_boot : for the MPC8306 and MPC8309, specifies that the
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SPISEL_BOOT signal is used as chip select for a slave device. Use
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reg = <number of gpios> in the corresponding child node, i.e. 0 if
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the gpios property is not present.
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Example:
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spi@4c0 {
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@ -95,8 +95,10 @@ static inline u32 mpc8xxx_spi_read_reg(__be32 __iomem *reg)
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struct mpc8xxx_spi_probe_info {
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struct fsl_spi_platform_data pdata;
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int ngpios;
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int *gpios;
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bool *alow_flags;
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__be32 __iomem *immr_spi_cs;
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};
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extern u32 mpc8xxx_spi_tx_buf_u8(struct mpc8xxx_spi *mpc8xxx_spi);
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@ -39,6 +39,14 @@
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#include <linux/spi/spi_bitbang.h>
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#include <linux/types.h>
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#ifdef CONFIG_FSL_SOC
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#include <sysdev/fsl_soc.h>
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#endif
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/* Specific to the MPC8306/MPC8309 */
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#define IMMR_SPI_CS_OFFSET 0x14c
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#define SPI_BOOT_SEL_BIT 0x80000000
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#include "spi-fsl-lib.h"
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#include "spi-fsl-cpm.h"
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#include "spi-fsl-spi.h"
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@ -701,10 +709,17 @@ static void fsl_spi_cs_control(struct spi_device *spi, bool on)
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struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
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struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata);
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u16 cs = spi->chip_select;
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if (cs < pinfo->ngpios) {
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int gpio = pinfo->gpios[cs];
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bool alow = pinfo->alow_flags[cs];
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gpio_set_value(gpio, on ^ alow);
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} else {
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if (WARN_ON_ONCE(cs > pinfo->ngpios || !pinfo->immr_spi_cs))
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return;
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iowrite32be(on ? SPI_BOOT_SEL_BIT : 0, pinfo->immr_spi_cs);
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}
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}
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static int of_fsl_spi_get_chipselects(struct device *dev)
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@ -712,12 +727,15 @@ static int of_fsl_spi_get_chipselects(struct device *dev)
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struct device_node *np = dev->of_node;
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struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
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struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata);
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bool spisel_boot = IS_ENABLED(CONFIG_FSL_SOC) &&
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of_property_read_bool(np, "fsl,spisel_boot");
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int ngpios;
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int i = 0;
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int ret;
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ngpios = of_gpio_count(np);
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if (ngpios <= 0) {
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ngpios = max(ngpios, 0);
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if (ngpios == 0 && !spisel_boot) {
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/*
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* SPI w/o chip-select line. One SPI device is still permitted
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* though.
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@ -726,6 +744,7 @@ static int of_fsl_spi_get_chipselects(struct device *dev)
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return 0;
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}
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pinfo->ngpios = ngpios;
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pinfo->gpios = kmalloc_array(ngpios, sizeof(*pinfo->gpios),
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GFP_KERNEL);
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if (!pinfo->gpios)
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@ -769,7 +788,18 @@ static int of_fsl_spi_get_chipselects(struct device *dev)
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}
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}
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pdata->max_chipselect = ngpios;
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#if IS_ENABLED(CONFIG_FSL_SOC)
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if (spisel_boot) {
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pinfo->immr_spi_cs = ioremap(get_immrbase() + IMMR_SPI_CS_OFFSET, 4);
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if (!pinfo->immr_spi_cs) {
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ret = -ENOMEM;
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i = ngpios - 1;
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goto err_loop;
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}
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}
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#endif
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pdata->max_chipselect = ngpios + spisel_boot;
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pdata->cs_control = fsl_spi_cs_control;
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return 0;
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