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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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Merge branch 'ux500/timers' into next/timer
* ux500/timers: ARM: plat-nomadik: modernize MTU timer ARM: plat-nomadik: handle clocking properly ARM: plat-nomadik: get rid of global mtu base pointer
This commit is contained in:
commit
69adb983ce
@ -27,11 +27,11 @@
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#include <asm/mach/arch.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/flash.h>
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#include <asm/mach/flash.h>
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#include <asm/mach/time.h>
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#include <plat/gpio-nomadik.h>
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#include <plat/gpio-nomadik.h>
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#include <plat/mtu.h>
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#include <plat/mtu.h>
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#include <mach/setup.h>
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#include <mach/nand.h>
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#include <mach/nand.h>
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#include <mach/fsmc.h>
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#include <mach/fsmc.h>
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@ -255,10 +255,7 @@ static void __init nomadik_timer_init(void)
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src_cr |= SRC_CR_INIT_VAL;
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src_cr |= SRC_CR_INIT_VAL;
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writel(src_cr, io_p2v(NOMADIK_SRC_BASE));
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writel(src_cr, io_p2v(NOMADIK_SRC_BASE));
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/* Save global pointer to mtu, used by platform timer code */
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nmdk_timer_init(io_p2v(NOMADIK_MTU0_BASE));
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mtu_base = io_p2v(NOMADIK_MTU0_BASE);
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nmdk_timer_init();
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}
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}
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static struct sys_timer nomadik_timer = {
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static struct sys_timer nomadik_timer = {
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@ -1,19 +0,0 @@
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/*
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* These symbols are needed for board-specific files to call their
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* own cpu-specific files
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*/
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#ifndef __ASM_ARCH_SETUP_H
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#define __ASM_ARCH_SETUP_H
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#include <asm/mach/time.h>
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#include <linux/init.h>
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#ifdef CONFIG_NOMADIK_8815
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extern void nmdk_timer_init(void);
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#endif /* NOMADIK_8815 */
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#endif /* __ASM_ARCH_SETUP_H */
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@ -27,9 +27,6 @@ extern void __init u5500_sdi_init(void);
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extern void __init db5500_dma_init(void);
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extern void __init db5500_dma_init(void);
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/* We re-use nomadik_timer for this platform */
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extern void nmdk_timer_init(void);
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struct amba_device;
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struct amba_device;
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extern void __init amba_add_devices(struct amba_device *devs[], int num);
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extern void __init amba_add_devices(struct amba_device *devs[], int num);
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@ -17,19 +17,20 @@
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static void __init ux500_timer_init(void)
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static void __init ux500_timer_init(void)
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{
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{
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void __iomem *mtu_timer_base;
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void __iomem *prcmu_timer_base;
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void __iomem *prcmu_timer_base;
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if (cpu_is_u5500()) {
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if (cpu_is_u5500()) {
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#ifdef CONFIG_LOCAL_TIMERS
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#ifdef CONFIG_LOCAL_TIMERS
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twd_base = __io_address(U5500_TWD_BASE);
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twd_base = __io_address(U5500_TWD_BASE);
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#endif
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#endif
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mtu_base = __io_address(U5500_MTU0_BASE);
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mtu_timer_base = __io_address(U5500_MTU0_BASE);
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prcmu_timer_base = __io_address(U5500_PRCMU_TIMER_3_BASE);
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prcmu_timer_base = __io_address(U5500_PRCMU_TIMER_3_BASE);
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} else if (cpu_is_u8500()) {
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} else if (cpu_is_u8500()) {
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#ifdef CONFIG_LOCAL_TIMERS
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#ifdef CONFIG_LOCAL_TIMERS
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twd_base = __io_address(U8500_TWD_BASE);
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twd_base = __io_address(U8500_TWD_BASE);
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#endif
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#endif
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mtu_base = __io_address(U8500_MTU0_BASE);
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mtu_timer_base = __io_address(U8500_MTU0_BASE);
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prcmu_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE);
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prcmu_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE);
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} else {
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} else {
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ux500_unknown_soc();
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ux500_unknown_soc();
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@ -52,7 +53,7 @@ static void __init ux500_timer_init(void)
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*
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*
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*/
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*/
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nmdk_timer_init();
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nmdk_timer_init(mtu_timer_base);
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clksrc_dbx500_prcmu_init(prcmu_timer_base);
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clksrc_dbx500_prcmu_init(prcmu_timer_base);
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}
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}
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@ -1,9 +1,7 @@
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#ifndef __PLAT_MTU_H
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#ifndef __PLAT_MTU_H
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#define __PLAT_MTU_H
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#define __PLAT_MTU_H
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/* should be set by the platform code */
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void nmdk_timer_init(void __iomem *base);
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extern void __iomem *mtu_base;
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void nmdk_clkevt_reset(void);
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void nmdk_clkevt_reset(void);
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void nmdk_clksrc_reset(void);
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void nmdk_clksrc_reset(void);
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@ -20,12 +20,6 @@
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#include <asm/mach/time.h>
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#include <asm/mach/time.h>
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#include <asm/sched_clock.h>
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#include <asm/sched_clock.h>
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/*
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* Guaranteed runtime conversion range in seconds for
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* the clocksource and clockevent.
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*/
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#define MTU_MIN_RANGE 4
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/*
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/*
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* The MTU device hosts four different counters, with 4 set of
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* The MTU device hosts four different counters, with 4 set of
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* registers. These are register names.
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* registers. These are register names.
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@ -66,12 +60,11 @@
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#define MTU_PCELL2 0xff8
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#define MTU_PCELL2 0xff8
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#define MTU_PCELL3 0xffC
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#define MTU_PCELL3 0xffC
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static void __iomem *mtu_base;
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static bool clkevt_periodic;
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static bool clkevt_periodic;
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static u32 clk_prescale;
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static u32 clk_prescale;
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static u32 nmdk_cycle; /* write-once */
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static u32 nmdk_cycle; /* write-once */
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void __iomem *mtu_base; /* Assigned by machine code */
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#ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK
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#ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK
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/*
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/*
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* Override the global weak sched_clock symbol with this
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* Override the global weak sched_clock symbol with this
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@ -103,7 +96,6 @@ static int nmdk_clkevt_next(unsigned long evt, struct clock_event_device *ev)
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void nmdk_clkevt_reset(void)
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void nmdk_clkevt_reset(void)
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{
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{
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if (clkevt_periodic) {
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if (clkevt_periodic) {
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/* Timer: configure load and background-load, and fire it up */
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/* Timer: configure load and background-load, and fire it up */
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writel(nmdk_cycle, mtu_base + MTU_LR(1));
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writel(nmdk_cycle, mtu_base + MTU_LR(1));
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writel(nmdk_cycle, mtu_base + MTU_BGLR(1));
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writel(nmdk_cycle, mtu_base + MTU_BGLR(1));
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@ -121,7 +113,6 @@ void nmdk_clkevt_reset(void)
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static void nmdk_clkevt_mode(enum clock_event_mode mode,
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static void nmdk_clkevt_mode(enum clock_event_mode mode,
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struct clock_event_device *dev)
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struct clock_event_device *dev)
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{
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{
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switch (mode) {
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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case CLOCK_EVT_MODE_PERIODIC:
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clkevt_periodic = true;
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clkevt_periodic = true;
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@ -183,15 +174,16 @@ void nmdk_clksrc_reset(void)
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mtu_base + MTU_CR(0));
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mtu_base + MTU_CR(0));
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}
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}
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void __init nmdk_timer_init(void)
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void __init nmdk_timer_init(void __iomem *base)
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{
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{
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unsigned long rate;
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unsigned long rate;
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struct clk *clk0;
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struct clk *clk0;
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mtu_base = base;
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clk0 = clk_get_sys("mtu0", NULL);
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clk0 = clk_get_sys("mtu0", NULL);
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BUG_ON(IS_ERR(clk0));
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BUG_ON(IS_ERR(clk0));
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BUG_ON(clk_prepare(clk0) < 0);
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clk_enable(clk0);
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BUG_ON(clk_enable(clk0) < 0);
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/*
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/*
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* Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz
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* Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz
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@ -224,17 +216,8 @@ void __init nmdk_timer_init(void)
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setup_sched_clock(nomadik_read_sched_clock, 32, rate);
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setup_sched_clock(nomadik_read_sched_clock, 32, rate);
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#endif
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#endif
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/* Timer 1 is used for events */
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/* Timer 1 is used for events, register irq and clockevents */
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clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE);
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nmdk_clkevt.max_delta_ns =
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clockevent_delta2ns(0xffffffff, &nmdk_clkevt);
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nmdk_clkevt.min_delta_ns =
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clockevent_delta2ns(0x00000002, &nmdk_clkevt);
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nmdk_clkevt.cpumask = cpumask_of(0);
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/* Register irq and clockevents */
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setup_irq(IRQ_MTU0, &nmdk_timer_irq);
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setup_irq(IRQ_MTU0, &nmdk_timer_irq);
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clockevents_register_device(&nmdk_clkevt);
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nmdk_clkevt.cpumask = cpumask_of(0);
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clockevents_config_and_register(&nmdk_clkevt, rate, 2, 0xffffffffU);
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}
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}
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