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Merge tag 'drm-intel-fixes-2017-02-09' of git://anongit.freedesktop.org/git/drm-intel into drm-fixes
Hopefully final fixes for v4.10, about half of them stable material. * tag 'drm-intel-fixes-2017-02-09' of git://anongit.freedesktop.org/git/drm-intel: drm/i915: Always convert incoming exec offsets to non-canonical drm/i915: Remove overzealous fence warn on runtime suspend drm/i915/bxt: Add MST support when do DPLL calculation drm/i915: don't warn about Skylake CPU - KabyPoint PCH combo drm/i915: fix i915 running as dom0 under Xen drm/i915: Flush untouched framebuffers before display on !llc drm/i915: fix use-after-free in page_flip_completed()
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697d3a2161
@ -213,7 +213,8 @@ static void intel_detect_pch(struct drm_device *dev)
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} else if (id == INTEL_PCH_KBP_DEVICE_ID_TYPE) {
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dev_priv->pch_type = PCH_KBP;
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DRM_DEBUG_KMS("Found KabyPoint PCH\n");
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WARN_ON(!IS_KABYLAKE(dev_priv));
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WARN_ON(!IS_SKYLAKE(dev_priv) &&
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!IS_KABYLAKE(dev_priv));
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} else if ((id == INTEL_PCH_P2X_DEVICE_ID_TYPE) ||
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(id == INTEL_PCH_P3X_DEVICE_ID_TYPE) ||
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((id == INTEL_PCH_QEMU_DEVICE_ID_TYPE) &&
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@ -2427,6 +2428,7 @@ static int intel_runtime_resume(struct device *kdev)
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* we can do is to hope that things will still work (and disable RPM).
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*/
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i915_gem_init_swizzling(dev_priv);
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i915_gem_restore_fences(dev_priv);
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intel_runtime_pm_enable_interrupts(dev_priv);
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@ -2010,8 +2010,16 @@ void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv)
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for (i = 0; i < dev_priv->num_fence_regs; i++) {
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struct drm_i915_fence_reg *reg = &dev_priv->fence_regs[i];
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if (WARN_ON(reg->pin_count))
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continue;
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/* Ideally we want to assert that the fence register is not
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* live at this point (i.e. that no piece of code will be
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* trying to write through fence + GTT, as that both violates
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* our tracking of activity and associated locking/barriers,
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* but also is illegal given that the hw is powered down).
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*
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* Previously we used reg->pin_count as a "liveness" indicator.
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* That is not sufficient, and we need a more fine-grained
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* tool if we want to have a sanity check here.
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*/
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if (!reg->vma)
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continue;
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@ -3478,7 +3486,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
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vma->display_alignment = max_t(u64, vma->display_alignment, alignment);
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/* Treat this as an end-of-frame, like intel_user_framebuffer_dirty() */
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if (obj->cache_dirty) {
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if (obj->cache_dirty || obj->base.write_domain == I915_GEM_DOMAIN_CPU) {
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i915_gem_clflush_object(obj, true);
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intel_fb_obj_flush(obj, false, ORIGIN_DIRTYFB);
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}
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@ -1181,14 +1181,14 @@ validate_exec_list(struct drm_device *dev,
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if (exec[i].offset !=
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gen8_canonical_addr(exec[i].offset & PAGE_MASK))
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return -EINVAL;
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/* From drm_mm perspective address space is continuous,
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* so from this point we're always using non-canonical
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* form internally.
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*/
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exec[i].offset = gen8_noncanonical_addr(exec[i].offset);
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}
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/* From drm_mm perspective address space is continuous,
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* so from this point we're always using non-canonical
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* form internally.
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*/
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exec[i].offset = gen8_noncanonical_addr(exec[i].offset);
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if (exec[i].alignment && !is_power_of_2(exec[i].alignment))
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return -EINVAL;
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@ -66,8 +66,16 @@ i915_gem_object_get_pages_internal(struct drm_i915_gem_object *obj)
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max_order = MAX_ORDER;
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#ifdef CONFIG_SWIOTLB
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if (swiotlb_nr_tbl()) /* minimum max swiotlb size is IO_TLB_SEGSIZE */
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max_order = min(max_order, ilog2(IO_TLB_SEGPAGES));
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if (swiotlb_nr_tbl()) {
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unsigned int max_segment;
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max_segment = swiotlb_max_segment();
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if (max_segment) {
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max_segment = max_t(unsigned int, max_segment,
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PAGE_SIZE) >> PAGE_SHIFT;
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max_order = min(max_order, ilog2(max_segment));
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}
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}
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#endif
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gfp = GFP_KERNEL | __GFP_HIGHMEM | __GFP_RECLAIMABLE;
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@ -4262,10 +4262,10 @@ static void page_flip_completed(struct intel_crtc *intel_crtc)
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drm_crtc_vblank_put(&intel_crtc->base);
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wake_up_all(&dev_priv->pending_flip_queue);
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queue_work(dev_priv->wq, &work->unpin_work);
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trace_i915_flip_complete(intel_crtc->plane,
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work->pending_flip_obj);
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queue_work(dev_priv->wq, &work->unpin_work);
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}
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static int intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc)
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@ -1730,7 +1730,8 @@ bxt_get_dpll(struct intel_crtc *crtc,
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return NULL;
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if ((encoder->type == INTEL_OUTPUT_DP ||
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encoder->type == INTEL_OUTPUT_EDP) &&
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encoder->type == INTEL_OUTPUT_EDP ||
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encoder->type == INTEL_OUTPUT_DP_MST) &&
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!bxt_ddi_dp_set_dpll_hw_state(clock, &dpll_hw_state))
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return NULL;
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