mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 22:10:51 +07:00
Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into fixes
This commit is contained in:
commit
696314cf53
@ -7,7 +7,6 @@ config ARCH_OMAP2PLUS_TYPICAL
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default y
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select AEABI
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select REGULATOR
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select PM
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select PM_RUNTIME
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select VFP
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select NEON if ARCH_OMAP3 || ARCH_OMAP4
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@ -45,8 +45,6 @@ static struct omap_board_config_kernel am3517_crane_config[] __initdata = {
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static struct omap_board_mux board_mux[] __initdata = {
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{ .reg_offset = OMAP_MUX_TERMINATOR },
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};
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#else
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#define board_mux NULL
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#endif
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static void __init am3517_crane_init_early(void)
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@ -491,23 +491,22 @@ static void __init beagle_opp_init(void)
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/* Custom OPP enabled for all xM versions */
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if (cpu_is_omap3630()) {
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struct omap_hwmod *mh = omap_hwmod_lookup("mpu");
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struct omap_hwmod *dh = omap_hwmod_lookup("iva");
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struct device *dev;
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struct device *mpu_dev, *iva_dev;
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if (!mh || !dh) {
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mpu_dev = omap2_get_mpuss_device();
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iva_dev = omap2_get_iva_device();
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if (!mpu_dev || !iva_dev) {
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pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
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__func__, mh, dh);
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__func__, mpu_dev, iva_dev);
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return;
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}
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/* Enable MPU 1GHz and lower opps */
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dev = &mh->od->pdev.dev;
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r = opp_enable(dev, 800000000);
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r = opp_enable(mpu_dev, 800000000);
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/* TODO: MPU 1GHz needs SR and ABB */
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/* Enable IVA 800MHz and lower opps */
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dev = &dh->od->pdev.dev;
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r |= opp_enable(dev, 660000000);
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r |= opp_enable(iva_dev, 660000000);
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/* TODO: DSP 800MHz needs SR and ABB */
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if (r) {
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pr_err("%s: failed to enable higher opp %d\n",
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@ -516,10 +515,8 @@ static void __init beagle_opp_init(void)
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* Cleanup - disable the higher freqs - we dont care
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* about the results
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*/
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dev = &mh->od->pdev.dev;
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opp_disable(dev, 800000000);
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dev = &dh->od->pdev.dev;
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opp_disable(dev, 660000000);
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opp_disable(mpu_dev, 800000000);
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opp_disable(iva_dev, 660000000);
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}
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}
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return;
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@ -18,13 +18,36 @@ extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs);
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extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs);
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extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs);
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extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs);
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# ifdef CONFIG_ARCH_OMAP4
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extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,
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u16 clkctrl_offs);
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extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
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u16 clkctrl_offs);
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extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
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u16 clkctrl_offs);
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# else
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static inline int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,
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u16 clkctrl_offs)
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{
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return 0;
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}
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static inline void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst,
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s16 cdoffs, u16 clkctrl_offs)
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{
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}
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static inline void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
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u16 clkctrl_offs)
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{
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}
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# endif
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/*
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* In an ideal world, we would not export these low-level functions,
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* but this will probably take some time to fix properly
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@ -821,11 +821,10 @@ static void __init omap_mux_set_cmdline_signals(void)
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if (!omap_mux_options)
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return;
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options = kmalloc(strlen(omap_mux_options) + 1, GFP_KERNEL);
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options = kstrdup(omap_mux_options, GFP_KERNEL);
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if (!options)
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return;
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strcpy(options, omap_mux_options);
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next_opt = options;
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while ((token = strsep(&next_opt, ",")) != NULL) {
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@ -855,24 +854,19 @@ static int __init omap_mux_copy_names(struct omap_mux *src,
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for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
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if (src->muxnames[i]) {
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dst->muxnames[i] =
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kmalloc(strlen(src->muxnames[i]) + 1,
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GFP_KERNEL);
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dst->muxnames[i] = kstrdup(src->muxnames[i],
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GFP_KERNEL);
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if (!dst->muxnames[i])
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goto free;
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strcpy(dst->muxnames[i], src->muxnames[i]);
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}
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}
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#ifdef CONFIG_DEBUG_FS
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for (i = 0; i < OMAP_MUX_NR_SIDES; i++) {
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if (src->balls[i]) {
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dst->balls[i] =
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kmalloc(strlen(src->balls[i]) + 1,
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GFP_KERNEL);
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dst->balls[i] = kstrdup(src->balls[i], GFP_KERNEL);
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if (!dst->balls[i])
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goto free;
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strcpy(dst->balls[i], src->balls[i]);
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}
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}
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#endif
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@ -621,7 +621,7 @@ void sr_disable(struct voltagedomain *voltdm)
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sr_v2_disable(sr);
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}
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pm_runtime_put_sync(&sr->pdev->dev);
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pm_runtime_put_sync_suspend(&sr->pdev->dev);
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}
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/**
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@ -860,6 +860,7 @@ static int __init omap_sr_probe(struct platform_device *pdev)
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irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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pm_runtime_enable(&pdev->dev);
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pm_runtime_irq_safe(&pdev->dev);
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sr_info->pdev = pdev;
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sr_info->srid = pdev->id;
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@ -293,7 +293,8 @@ static void __init omap2_gp_clocksource_init(int gptimer_id,
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pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n",
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gptimer_id, clksrc.rate);
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__omap_dm_timer_load_start(clksrc.io_base, OMAP_TIMER_CTRL_ST, 0, 1);
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__omap_dm_timer_load_start(clksrc.io_base,
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OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
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init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate);
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if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
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@ -48,14 +48,7 @@ void __init omap_pmic_init(int bus, u32 clkrate,
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omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
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}
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static struct twl4030_usb_data omap4_usb_pdata = {
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.phy_init = omap4430_phy_init,
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.phy_exit = omap4430_phy_exit,
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.phy_power = omap4430_phy_power,
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.phy_set_clock = omap4430_phy_set_clk,
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.phy_suspend = omap4430_phy_suspend,
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};
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#if defined(CONFIG_ARCH_OMAP3)
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static struct twl4030_usb_data omap3_usb_pdata = {
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.usb_mode = T2_USB_MODE_ULPI,
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};
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@ -122,6 +115,45 @@ static struct regulator_init_data omap3_vpll2_idata = {
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.consumer_supplies = omap3_vpll2_supplies,
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};
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void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
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u32 pdata_flags, u32 regulators_flags)
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{
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if (!pmic_data->irq_base)
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pmic_data->irq_base = TWL4030_IRQ_BASE;
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if (!pmic_data->irq_end)
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pmic_data->irq_end = TWL4030_IRQ_END;
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/* Common platform data configurations */
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if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
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pmic_data->usb = &omap3_usb_pdata;
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if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci)
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pmic_data->bci = &omap3_bci_pdata;
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if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc)
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pmic_data->madc = &omap3_madc_pdata;
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if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio)
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pmic_data->audio = &omap3_audio_pdata;
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/* Common regulator configurations */
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if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
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pmic_data->vdac = &omap3_vdac_idata;
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if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2)
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pmic_data->vpll2 = &omap3_vpll2_idata;
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}
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#endif /* CONFIG_ARCH_OMAP3 */
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#if defined(CONFIG_ARCH_OMAP4)
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static struct twl4030_usb_data omap4_usb_pdata = {
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.phy_init = omap4430_phy_init,
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.phy_exit = omap4430_phy_exit,
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.phy_power = omap4430_phy_power,
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.phy_set_clock = omap4430_phy_set_clk,
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.phy_suspend = omap4430_phy_suspend,
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};
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static struct regulator_init_data omap4_vdac_idata = {
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.constraints = {
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.min_uV = 1800000,
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@ -273,32 +305,4 @@ void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
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!pmic_data->clk32kg)
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pmic_data->clk32kg = &omap4_clk32kg_idata;
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}
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void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
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u32 pdata_flags, u32 regulators_flags)
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{
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if (!pmic_data->irq_base)
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pmic_data->irq_base = TWL4030_IRQ_BASE;
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if (!pmic_data->irq_end)
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pmic_data->irq_end = TWL4030_IRQ_END;
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/* Common platform data configurations */
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if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
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pmic_data->usb = &omap3_usb_pdata;
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if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci)
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pmic_data->bci = &omap3_bci_pdata;
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if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc)
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pmic_data->madc = &omap3_madc_pdata;
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if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio)
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pmic_data->audio = &omap3_audio_pdata;
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/* Common regulator configurations */
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if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
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pmic_data->vdac = &omap3_vdac_idata;
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if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2)
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pmic_data->vpll2 = &omap3_vpll2_idata;
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}
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#endif /* CONFIG_ARCH_OMAP4 */
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@ -13,6 +13,7 @@ config ARCH_OMAP1
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bool "TI OMAP1"
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select GENERIC_IRQ_CHIP
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help
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"Systems based on omap7xx, omap15xx or omap16xx"
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@ -195,6 +195,11 @@
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#define OMAP36XX_DMA_UART4_TX 81 /* S_DMA_80 */
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#define OMAP36XX_DMA_UART4_RX 82 /* S_DMA_81 */
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/* Only for AM35xx */
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#define AM35XX_DMA_UART4_TX 54
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#define AM35XX_DMA_UART4_RX 55
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/*----------------------------------------------------------------------------*/
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#define OMAP1_DMA_TOUT_IRQ (1 << 0)
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@ -357,6 +357,7 @@
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#define INT_35XX_EMAC_C0_TX_PULSE_IRQ 69
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#define INT_35XX_EMAC_C0_MISC_PULSE_IRQ 70
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#define INT_35XX_USBOTG_IRQ 71
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#define INT_35XX_UART4 84
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#define INT_35XX_CCDC_VD0_IRQ 88
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#define INT_35XX_CCDC_VD1_IRQ 92
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#define INT_35XX_CCDC_VD2_IRQ 93
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@ -56,6 +56,9 @@
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#define TI816X_UART2_BASE 0x48022000
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#define TI816X_UART3_BASE 0x48024000
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/* AM3505/3517 UART4 */
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#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */
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/* External port on Zoom2/3 */
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#define ZOOM_UART_BASE 0x10000000
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#define ZOOM_UART_VIRT 0xfa400000
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@ -423,9 +423,6 @@ static void sgtable_fill_kmalloc(struct sg_table *sgt, u32 pa, u32 da,
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{
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unsigned int i;
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struct scatterlist *sg;
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void *va;
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va = phys_to_virt(pa);
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for_each_sg(sgt->sgl, sg, sgt->nents, i) {
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unsigned bytes;
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@ -910,7 +910,7 @@ omapl138_case_a3 MACH_OMAPL138_CASE_A3 OMAPL138_CASE_A3 3280
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uemd MACH_UEMD UEMD 3281
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ccwmx51mut MACH_CCWMX51MUT CCWMX51MUT 3282
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rockhopper MACH_ROCKHOPPER ROCKHOPPER 3283
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nookcolor MACH_NOOKCOLOR NOOKCOLOR 3284
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encore MACH_ENCORE ENCORE 3284
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hkdkc100 MACH_HKDKC100 HKDKC100 3285
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ts42xx MACH_TS42XX TS42XX 3286
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aebl MACH_AEBL AEBL 3287
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