Second Round of Renesas ARM Based SoC Fixes for v3.16

* Fix SD2CKCR register address of r8a7791 (R-Car M2) SoC
 
   This corrects a bug introduced in v3.14 by
   59e79895b9 ("ARM: shmobile: r8a7791: Add clocks").
 
   However, it does not manifest in mainline code until
   SDHI devices were enabled on the Koelsch board in v3.15 by
   2c60a7df72 ("ARM: shmobile: Add SDHI devices for Koelsch DTS").
 
   It also manifests on the Henninger board when
   SDHI devices were enabled in v3.16-rc1 by
   1299df03d7 ("ARM: shmobile: henninger: add SDHI0/2 DT support")
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Merge tag 'renesas-fixes2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes

Merge "Second Round of Renesas ARM Based SoC Fixes for v3.16" from Simon Horman

* Fix SD2CKCR register address of r8a7791 (R-Car M2) SoC

  This corrects a bug introduced in v3.14 by
  59e79895b9 ("ARM: shmobile: r8a7791: Add clocks").

  However, it does not manifest in mainline code until
  SDHI devices were enabled on the Koelsch board in v3.15 by
  2c60a7df72 ("ARM: shmobile: Add SDHI devices for Koelsch DTS").

  It also manifests on the Henninger board when
  SDHI devices were enabled in v3.16-rc1 by
  1299df03d7 ("ARM: shmobile: henninger: add SDHI0/2 DT support")

* tag 'renesas-fixes2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7791: Fix SD2CKCR register address

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2014-07-24 13:24:57 +02:00
commit 683809f27e

View File

@ -540,9 +540,9 @@ sd1_clk: sd2_clk@e6150078 {
#clock-cells = <0>;
clock-output-names = "sd1";
};
sd2_clk: sd3_clk@e615007c {
sd2_clk: sd3_clk@e615026c {
compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe615007c 0 4>;
reg = <0 0xe615026c 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
clock-output-names = "sd2";