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arm64: dts: msm8996: Add device node for qcom qusb2 phy
Adding device node for QUSB2 phy and the required infrastructure to enable support for the same. This phy is used by dwc3 controller present on msm8996. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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@ -88,6 +88,14 @@ sdhci@74a4900 {
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cd-gpios = <&msmgpio 38 0x1>;
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status = "okay";
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};
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phy@7411000 {
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status = "okay";
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};
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phy@7412000 {
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status = "okay";
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};
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};
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@ -538,6 +538,57 @@ mmcc: clock-controller@8c0000 {
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<960000000>,
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<825000000>;
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};
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qfprom@74000 {
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compatible = "qcom,qfprom";
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reg = <0x74000 0x8ff>;
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#address-cells = <1>;
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#size-cells = <1>;
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qusb2p_hstx_trim: hstx_trim@24e {
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reg = <0x24e 0x2>;
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bits = <5 4>;
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};
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qusb2s_hstx_trim: hstx_trim@24f {
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reg = <0x24f 0x1>;
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bits = <1 4>;
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};
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};
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hsusb_phy1: phy@7411000 {
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compatible = "qcom,msm8996-qusb2-phy";
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reg = <0x7411000 0x180>;
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#phy-cells = <0>;
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clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
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<&gcc GCC_RX1_USB2_CLKREF_CLK>;
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clock-names = "cfg_ahb", "ref";
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vdda-pll-supply = <&pm8994_l12>;
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vdda-phy-dpdm-supply = <&pm8994_l24>;
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resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
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nvmem-cells = <&qusb2p_hstx_trim>;
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status = "disabled";
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};
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hsusb_phy2: phy@7412000 {
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compatible = "qcom,msm8996-qusb2-phy";
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reg = <0x7412000 0x180>;
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#phy-cells = <0>;
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clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
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<&gcc GCC_RX2_USB2_CLKREF_CLK>;
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clock-names = "cfg_ahb", "ref";
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vdda-pll-supply = <&pm8994_l12>;
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vdda-phy-dpdm-supply = <&pm8994_l24>;
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resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
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nvmem-cells = <&qusb2s_hstx_trim>;
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status = "disabled";
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};
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};
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adsp-pil {
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