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ARM: dts: rockchip: fix PWM clock found on RK3288 Socs
We use the new PWM IP on RK3288, but the PWM's clock indeed incorrect. Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -682,7 +682,7 @@ pwm0: pwm@ff680000 {
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#pwm-cells = <3>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm0_pin>;
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clocks = <&cru PCLK_PWM>;
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clocks = <&cru PCLK_RKPWM>;
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clock-names = "pwm";
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status = "disabled";
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};
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@ -693,7 +693,7 @@ pwm1: pwm@ff680010 {
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#pwm-cells = <3>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm1_pin>;
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clocks = <&cru PCLK_PWM>;
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clocks = <&cru PCLK_RKPWM>;
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clock-names = "pwm";
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status = "disabled";
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};
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@ -704,7 +704,7 @@ pwm2: pwm@ff680020 {
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#pwm-cells = <3>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm2_pin>;
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clocks = <&cru PCLK_PWM>;
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clocks = <&cru PCLK_RKPWM>;
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clock-names = "pwm";
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status = "disabled";
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};
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@ -715,7 +715,7 @@ pwm3: pwm@ff680030 {
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#pwm-cells = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm3_pin>;
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clocks = <&cru PCLK_PWM>;
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clocks = <&cru PCLK_RKPWM>;
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clock-names = "pwm";
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status = "disabled";
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};
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