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iio: gyro: adxrs290: Add triggered buffer support
Provide a way for continuous data capture by setting up buffer support. The data ready signal exposed at the SYNC pin of the ADXRS290 is exploited as a hardware interrupt which triggers to fill the buffer. Triggered buffer setup was tested with both hardware trigger (DATA_RDY) and software triggers (sysfs-trig & hrtimer). Signed-off-by: Nishant Malpani <nish.malpani25@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20200910180450.29696-2-nish.malpani25@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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@ -44,6 +44,8 @@ config ADIS16260
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config ADXRS290
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tristate "Analog Devices ADXRS290 Dual-Axis MEMS Gyroscope SPI driver"
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depends on SPI
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select IIO_BUFFER
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select IIO_TRIGGERED_BUFFER
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help
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Say yes here to build support for Analog Devices ADXRS290 programmable
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digital output gyroscope.
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@ -13,8 +13,12 @@
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#include <linux/module.h>
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#include <linux/spi/spi.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/trigger.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#define ADXRS290_ADI_ID 0xAD
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#define ADXRS290_MEMS_ID 0x1D
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@ -35,7 +39,9 @@
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#define ADXRS290_READ BIT(7)
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#define ADXRS290_TSM BIT(0)
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#define ADXRS290_MEASUREMENT BIT(1)
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#define ADXRS290_SYNC GENMASK(1, 0)
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#define ADXRS290_DATA_RDY_OUT BIT(0)
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#define ADXRS290_SYNC_MASK GENMASK(1, 0)
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#define ADXRS290_SYNC(x) FIELD_PREP(ADXRS290_SYNC_MASK, x)
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#define ADXRS290_LPF_MASK GENMASK(2, 0)
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#define ADXRS290_LPF(x) FIELD_PREP(ADXRS290_LPF_MASK, x)
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#define ADXRS290_HPF_MASK GENMASK(7, 4)
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@ -50,6 +56,13 @@ enum adxrs290_mode {
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ADXRS290_MODE_MEASUREMENT,
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};
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enum adxrs290_scan_index {
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ADXRS290_IDX_X,
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ADXRS290_IDX_Y,
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ADXRS290_IDX_TEMP,
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ADXRS290_IDX_TS,
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};
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struct adxrs290_state {
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struct spi_device *spi;
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/* Serialize reads and their subsequent processing */
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@ -57,6 +70,12 @@ struct adxrs290_state {
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enum adxrs290_mode mode;
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unsigned int lpf_3db_freq_idx;
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unsigned int hpf_3db_freq_idx;
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struct iio_trigger *dready_trig;
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/* Ensure correct alignment of timestamp when present */
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struct {
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s16 channels[3];
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s64 ts __aligned(8);
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} buffer;
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};
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/*
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@ -270,24 +289,34 @@ static int adxrs290_read_raw(struct iio_dev *indio_dev,
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = iio_device_claim_direct_mode(indio_dev);
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if (ret)
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return ret;
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switch (chan->type) {
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case IIO_ANGL_VEL:
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ret = adxrs290_get_rate_data(indio_dev,
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ADXRS290_READ_REG(chan->address),
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val);
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if (ret < 0)
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return ret;
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break;
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return IIO_VAL_INT;
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ret = IIO_VAL_INT;
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break;
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case IIO_TEMP:
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ret = adxrs290_get_temp_data(indio_dev, val);
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if (ret < 0)
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return ret;
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break;
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return IIO_VAL_INT;
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ret = IIO_VAL_INT;
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break;
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default:
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return -EINVAL;
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ret = -EINVAL;
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break;
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}
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iio_device_release_direct_mode(indio_dev);
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return ret;
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case IIO_CHAN_INFO_SCALE:
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switch (chan->type) {
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case IIO_ANGL_VEL:
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@ -334,34 +363,52 @@ static int adxrs290_write_raw(struct iio_dev *indio_dev,
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long mask)
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{
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struct adxrs290_state *st = iio_priv(indio_dev);
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int lpf_idx, hpf_idx;
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int ret, lpf_idx, hpf_idx;
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ret = iio_device_claim_direct_mode(indio_dev);
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if (ret)
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return ret;
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switch (mask) {
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case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
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lpf_idx = adxrs290_find_match(adxrs290_lpf_3db_freq_hz_table,
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ARRAY_SIZE(adxrs290_lpf_3db_freq_hz_table),
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val, val2);
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if (lpf_idx < 0)
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return -EINVAL;
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if (lpf_idx < 0) {
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ret = -EINVAL;
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break;
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}
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/* caching the updated state of the low-pass filter */
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st->lpf_3db_freq_idx = lpf_idx;
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/* retrieving the current state of the high-pass filter */
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hpf_idx = st->hpf_3db_freq_idx;
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return adxrs290_set_filter_freq(indio_dev, lpf_idx, hpf_idx);
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ret = adxrs290_set_filter_freq(indio_dev, lpf_idx, hpf_idx);
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break;
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case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
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hpf_idx = adxrs290_find_match(adxrs290_hpf_3db_freq_hz_table,
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ARRAY_SIZE(adxrs290_hpf_3db_freq_hz_table),
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val, val2);
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if (hpf_idx < 0)
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return -EINVAL;
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if (hpf_idx < 0) {
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ret = -EINVAL;
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break;
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}
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/* caching the updated state of the high-pass filter */
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st->hpf_3db_freq_idx = hpf_idx;
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/* retrieving the current state of the low-pass filter */
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lpf_idx = st->lpf_3db_freq_idx;
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return adxrs290_set_filter_freq(indio_dev, lpf_idx, hpf_idx);
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ret = adxrs290_set_filter_freq(indio_dev, lpf_idx, hpf_idx);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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return -EINVAL;
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iio_device_release_direct_mode(indio_dev);
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return ret;
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}
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static int adxrs290_read_avail(struct iio_dev *indio_dev,
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@ -389,6 +436,72 @@ static int adxrs290_read_avail(struct iio_dev *indio_dev,
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}
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}
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static int adxrs290_data_rdy_trigger_set_state(struct iio_trigger *trig,
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bool state)
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{
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struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
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struct adxrs290_state *st = iio_priv(indio_dev);
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int ret;
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u8 val;
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val = state ? ADXRS290_SYNC(ADXRS290_DATA_RDY_OUT) : 0;
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ret = adxrs290_spi_write_reg(st->spi, ADXRS290_REG_DATA_RDY, val);
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if (ret < 0)
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dev_err(&st->spi->dev, "failed to start data rdy interrupt\n");
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return ret;
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}
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static int adxrs290_reset_trig(struct iio_trigger *trig)
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{
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struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
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int val;
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/*
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* Data ready interrupt is reset after a read of the data registers.
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* Here, we only read the 16b DATAY registers as that marks the end of
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* a read of the data registers and initiates a reset for the interrupt
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* line.
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*/
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adxrs290_get_rate_data(indio_dev,
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ADXRS290_READ_REG(ADXRS290_REG_DATAY0), &val);
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return 0;
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}
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static const struct iio_trigger_ops adxrs290_trigger_ops = {
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.set_trigger_state = &adxrs290_data_rdy_trigger_set_state,
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.validate_device = &iio_trigger_validate_own_device,
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.try_reenable = &adxrs290_reset_trig,
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};
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static irqreturn_t adxrs290_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct adxrs290_state *st = iio_priv(indio_dev);
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u8 tx = ADXRS290_READ_REG(ADXRS290_REG_DATAX0);
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int ret;
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mutex_lock(&st->lock);
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/* exercise a bulk data capture starting from reg DATAX0... */
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ret = spi_write_then_read(st->spi, &tx, sizeof(tx), st->buffer.channels,
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sizeof(st->buffer.channels));
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if (ret < 0)
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goto out_unlock_notify;
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iio_push_to_buffers_with_timestamp(indio_dev, &st->buffer,
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pf->timestamp);
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out_unlock_notify:
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mutex_unlock(&st->lock);
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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#define ADXRS290_ANGL_VEL_CHANNEL(reg, axis) { \
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.type = IIO_ANGL_VEL, \
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.address = reg, \
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@ -401,6 +514,13 @@ static int adxrs290_read_avail(struct iio_dev *indio_dev,
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.info_mask_shared_by_type_available = \
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BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \
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BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
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.scan_index = ADXRS290_IDX_##axis, \
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.scan_type = { \
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.sign = 's', \
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.realbits = 16, \
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.storagebits = 16, \
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.endianness = IIO_LE, \
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}, \
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}
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static const struct iio_chan_spec adxrs290_channels[] = {
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@ -411,7 +531,20 @@ static const struct iio_chan_spec adxrs290_channels[] = {
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.address = ADXRS290_REG_TEMP0,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
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BIT(IIO_CHAN_INFO_SCALE),
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.scan_index = ADXRS290_IDX_TEMP,
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.scan_type = {
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.sign = 's',
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.realbits = 12,
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.storagebits = 16,
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.endianness = IIO_LE,
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},
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},
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IIO_CHAN_SOFT_TIMESTAMP(ADXRS290_IDX_TS),
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};
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static const unsigned long adxrs290_avail_scan_masks[] = {
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BIT(ADXRS290_IDX_X) | BIT(ADXRS290_IDX_Y) | BIT(ADXRS290_IDX_TEMP),
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0
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};
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static const struct iio_info adxrs290_info = {
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@ -420,6 +553,44 @@ static const struct iio_info adxrs290_info = {
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.read_avail = &adxrs290_read_avail,
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};
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static int adxrs290_probe_trigger(struct iio_dev *indio_dev)
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{
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struct adxrs290_state *st = iio_priv(indio_dev);
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int ret;
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if (!st->spi->irq) {
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dev_info(&st->spi->dev, "no irq, using polling\n");
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return 0;
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}
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st->dready_trig = devm_iio_trigger_alloc(&st->spi->dev, "%s-dev%d",
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indio_dev->name,
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indio_dev->id);
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if (!st->dready_trig)
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return -ENOMEM;
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st->dready_trig->dev.parent = &st->spi->dev;
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st->dready_trig->ops = &adxrs290_trigger_ops;
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iio_trigger_set_drvdata(st->dready_trig, indio_dev);
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ret = devm_request_irq(&st->spi->dev, st->spi->irq,
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&iio_trigger_generic_data_rdy_poll,
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IRQF_ONESHOT, "adxrs290_irq", st->dready_trig);
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if (ret < 0)
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return dev_err_probe(&st->spi->dev, ret,
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"request irq %d failed\n", st->spi->irq);
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ret = devm_iio_trigger_register(&st->spi->dev, st->dready_trig);
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if (ret) {
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dev_err(&st->spi->dev, "iio trigger register failed\n");
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return ret;
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}
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indio_dev->trig = iio_trigger_get(st->dready_trig);
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return 0;
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}
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static int adxrs290_probe(struct spi_device *spi)
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{
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struct iio_dev *indio_dev;
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@ -439,6 +610,7 @@ static int adxrs290_probe(struct spi_device *spi)
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indio_dev->channels = adxrs290_channels;
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indio_dev->num_channels = ARRAY_SIZE(adxrs290_channels);
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indio_dev->info = &adxrs290_info;
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indio_dev->available_scan_masks = adxrs290_avail_scan_masks;
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mutex_init(&st->lock);
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@ -478,6 +650,17 @@ static int adxrs290_probe(struct spi_device *spi)
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st->lpf_3db_freq_idx = val;
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st->hpf_3db_freq_idx = val2;
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ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
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&iio_pollfunc_store_time,
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&adxrs290_trigger_handler, NULL);
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if (ret < 0)
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return dev_err_probe(&spi->dev, ret,
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"iio triggered buffer setup failed\n");
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ret = adxrs290_probe_trigger(indio_dev);
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if (ret < 0)
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return ret;
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return devm_iio_device_register(&spi->dev, indio_dev);
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}
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