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ARM: dts: stm32: Append additional I2Cs for STM32F746 SoC
Append 3 additional I2C instance for STM32F746 SoC. Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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@ -345,6 +345,42 @@ i2c1: i2c@40005400 {
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status = "disabled";
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};
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i2c2: i2c@40005800 {
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compatible = "st,stm32f7-i2c";
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reg = <0x40005800 0x400>;
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interrupts = <33>,
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<34>;
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resets = <&rcc STM32F7_APB1_RESET(I2C2)>;
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clocks = <&rcc 1 CLK_I2C2>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c3: i2c@40005C00 {
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compatible = "st,stm32f7-i2c";
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reg = <0x40005C00 0x400>;
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interrupts = <72>,
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<73>;
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resets = <&rcc STM32F7_APB1_RESET(I2C3)>;
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clocks = <&rcc 1 CLK_I2C3>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c4: i2c@40006000 {
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compatible = "st,stm32f7-i2c";
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reg = <0x40006000 0x400>;
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interrupts = <95>,
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<96>;
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resets = <&rcc STM32F7_APB1_RESET(I2C4)>;
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clocks = <&rcc 1 CLK_I2C4>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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cec: cec@40006c00 {
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compatible = "st,stm32-cec";
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reg = <0x40006C00 0x400>;
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