mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
FEC: Add time stamping code and a PTP hardware clock
This patch adds a driver for the FEC(MX6) that offers time stamping and a PTP haderware clock. Because FEC\ENET(MX6) hardware frequency adjustment is complex, we have implemented this in software by changing the multiplication factor of the timecounter. Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Frank Li
David S. Miller
parent
d6e0d9fcbb
commit
6605b730c0
@ -92,4 +92,13 @@ config GIANFAR
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This driver supports the Gigabit TSEC on the MPC83xx, MPC85xx,
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and MPC86xx family of chips, and the FEC on the 8540.
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config FEC_PTP
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bool "PTP Hardware Clock (PHC)"
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depends on FEC
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select PPS
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select PTP_1588_CLOCK
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--help---
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Say Y here if you want to use PTP Hardware Clock (PHC) in the
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driver. Only the basic clock operations have been implemented.
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endif # NET_VENDOR_FREESCALE
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@ -3,6 +3,7 @@
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#
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obj-$(CONFIG_FEC) += fec.o
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obj-$(CONFIG_FEC_PTP) += fec_ptp.o
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obj-$(CONFIG_FEC_MPC52xx) += fec_mpc52xx.o
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ifeq ($(CONFIG_FEC_MPC52xx_MDIO),y)
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obj-$(CONFIG_FEC_MPC52xx) += fec_mpc52xx_phy.o
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@ -280,6 +280,17 @@ fec_enet_start_xmit(struct sk_buff *skb, struct net_device *ndev)
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| BD_ENET_TX_LAST | BD_ENET_TX_TC);
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bdp->cbd_sc = status;
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#ifdef CONFIG_FEC_PTP
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bdp->cbd_bdu = 0;
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if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
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fep->hwts_tx_en)) {
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bdp->cbd_esc = (BD_ENET_TX_TS | BD_ENET_TX_INT);
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skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
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} else {
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bdp->cbd_esc = BD_ENET_TX_INT;
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}
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#endif
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/* Trigger transmission start */
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writel(0, fep->hwp + FEC_X_DES_ACTIVE);
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@ -437,10 +448,17 @@ fec_restart(struct net_device *ndev, int duplex)
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writel(1 << 8, fep->hwp + FEC_X_WMRK);
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}
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#ifdef CONFIG_FEC_PTP
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ecntl |= (1 << 4);
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#endif
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/* And last, enable the transmit and receive processing */
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writel(ecntl, fep->hwp + FEC_ECNTRL);
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writel(0, fep->hwp + FEC_R_DES_ACTIVE);
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#ifdef CONFIG_FEC_PTP
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fec_ptp_start_cyclecounter(ndev);
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#endif
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/* Enable interrupts we wish to service */
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writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
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}
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@ -526,6 +544,19 @@ fec_enet_tx(struct net_device *ndev)
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ndev->stats.tx_packets++;
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}
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#ifdef CONFIG_FEC_PTP
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if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS)) {
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struct skb_shared_hwtstamps shhwtstamps;
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unsigned long flags;
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memset(&shhwtstamps, 0, sizeof(shhwtstamps));
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spin_lock_irqsave(&fep->tmreg_lock, flags);
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shhwtstamps.hwtstamp = ns_to_ktime(
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timecounter_cyc2time(&fep->tc, bdp->ts));
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spin_unlock_irqrestore(&fep->tmreg_lock, flags);
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skb_tstamp_tx(skb, &shhwtstamps);
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}
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#endif
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if (status & BD_ENET_TX_READY)
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printk("HEY! Enet xmit interrupt and TX_READY.\n");
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@ -652,6 +683,21 @@ fec_enet_rx(struct net_device *ndev)
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skb_put(skb, pkt_len - 4); /* Make room */
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skb_copy_to_linear_data(skb, data, pkt_len - 4);
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skb->protocol = eth_type_trans(skb, ndev);
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#ifdef CONFIG_FEC_PTP
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/* Get receive timestamp from the skb */
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if (fep->hwts_rx_en) {
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struct skb_shared_hwtstamps *shhwtstamps =
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skb_hwtstamps(skb);
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unsigned long flags;
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memset(shhwtstamps, 0, sizeof(*shhwtstamps));
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spin_lock_irqsave(&fep->tmreg_lock, flags);
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shhwtstamps->hwtstamp = ns_to_ktime(
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timecounter_cyc2time(&fep->tc, bdp->ts));
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spin_unlock_irqrestore(&fep->tmreg_lock, flags);
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}
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#endif
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if (!skb_defer_rx_timestamp(skb))
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netif_rx(skb);
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}
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@ -666,6 +712,12 @@ fec_enet_rx(struct net_device *ndev)
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status |= BD_ENET_RX_EMPTY;
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bdp->cbd_sc = status;
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#ifdef CONFIG_FEC_PTP
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bdp->cbd_esc = BD_ENET_RX_INT;
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bdp->cbd_prot = 0;
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bdp->cbd_bdu = 0;
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#endif
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/* Update BD pointer to next entry */
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if (status & BD_ENET_RX_WRAP)
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bdp = fep->rx_bd_base;
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@ -1105,6 +1157,10 @@ static int fec_enet_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
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if (!phydev)
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return -ENODEV;
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#ifdef CONFIG_FEC_PTP
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if (cmd == SIOCSHWTSTAMP)
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return fec_ptp_ioctl(ndev, rq, cmd);
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#endif
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return phy_mii_ioctl(phydev, rq, cmd);
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}
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@ -1151,6 +1207,9 @@ static int fec_enet_alloc_buffers(struct net_device *ndev)
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bdp->cbd_bufaddr = dma_map_single(&fep->pdev->dev, skb->data,
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FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
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bdp->cbd_sc = BD_ENET_RX_EMPTY;
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#ifdef CONFIG_FEC_PTP
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bdp->cbd_esc = BD_ENET_RX_INT;
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#endif
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bdp++;
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}
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@ -1164,6 +1223,10 @@ static int fec_enet_alloc_buffers(struct net_device *ndev)
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bdp->cbd_sc = 0;
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bdp->cbd_bufaddr = 0;
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#ifdef CONFIG_FEC_PTP
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bdp->cbd_esc = BD_ENET_RX_INT;
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#endif
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bdp++;
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}
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@ -1565,9 +1628,19 @@ fec_probe(struct platform_device *pdev)
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goto failed_clk;
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}
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#ifdef CONFIG_FEC_PTP
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fep->clk_ptp = devm_clk_get(&pdev->dev, "ptp");
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if (IS_ERR(fep->clk_ptp)) {
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ret = PTR_ERR(fep->clk_ptp);
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goto failed_clk;
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}
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#endif
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clk_prepare_enable(fep->clk_ahb);
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clk_prepare_enable(fep->clk_ipg);
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#ifdef CONFIG_FEC_PTP
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clk_prepare_enable(fep->clk_ptp);
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#endif
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reg_phy = devm_regulator_get(&pdev->dev, "phy");
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if (!IS_ERR(reg_phy)) {
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ret = regulator_enable(reg_phy);
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@ -1595,6 +1668,10 @@ fec_probe(struct platform_device *pdev)
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if (ret)
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goto failed_register;
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#ifdef CONFIG_FEC_PTP
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fec_ptp_init(ndev, pdev);
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#endif
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return 0;
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failed_register:
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@ -1604,6 +1681,9 @@ fec_probe(struct platform_device *pdev)
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failed_regulator:
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clk_disable_unprepare(fep->clk_ahb);
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clk_disable_unprepare(fep->clk_ipg);
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#ifdef CONFIG_FEC_PTP
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clk_disable_unprepare(fep->clk_ptp);
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#endif
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failed_pin:
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failed_clk:
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for (i = 0; i < FEC_IRQ_NUM; i++) {
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@ -1636,6 +1716,12 @@ fec_drv_remove(struct platform_device *pdev)
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if (irq > 0)
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free_irq(irq, ndev);
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}
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#ifdef CONFIG_FEC_PTP
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del_timer_sync(&fep->time_keep);
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clk_disable_unprepare(fep->clk_ptp);
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if (fep->ptp_clock)
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ptp_clock_unregister(fep->ptp_clock);
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#endif
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clk_disable_unprepare(fep->clk_ahb);
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clk_disable_unprepare(fep->clk_ipg);
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iounmap(fep->hwp);
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@ -13,6 +13,12 @@
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#define FEC_H
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/****************************************************************************/
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#ifdef CONFIG_FEC_PTP
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#include <linux/clocksource.h>
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#include <linux/net_tstamp.h>
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#include <linux/ptp_clock_kernel.h>
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#endif
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#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
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defined(CONFIG_M520x) || defined(CONFIG_M532x) || \
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defined(CONFIG_ARCH_MXC) || defined(CONFIG_SOC_IMX28)
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@ -88,6 +94,13 @@ struct bufdesc {
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unsigned short cbd_datlen; /* Data length */
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unsigned short cbd_sc; /* Control and status info */
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unsigned long cbd_bufaddr; /* Buffer address */
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#ifdef CONFIG_FEC_PTP
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unsigned long cbd_esc;
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unsigned long cbd_prot;
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unsigned long cbd_bdu;
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unsigned long ts;
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unsigned short res0[4];
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#endif
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};
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#else
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struct bufdesc {
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@ -190,6 +203,9 @@ struct fec_enet_private {
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struct clk *clk_ipg;
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struct clk *clk_ahb;
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#ifdef CONFIG_FEC_PTP
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struct clk *clk_ptp;
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#endif
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/* The saved address of a sent-in-place packet/buffer, for skfree(). */
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unsigned char *tx_bounce[TX_RING_SIZE];
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@ -227,7 +243,29 @@ struct fec_enet_private {
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int full_duplex;
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struct completion mdio_done;
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int irq[FEC_IRQ_NUM];
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#ifdef CONFIG_FEC_PTP
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struct ptp_clock *ptp_clock;
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struct ptp_clock_info ptp_caps;
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unsigned long last_overflow_check;
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spinlock_t tmreg_lock;
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struct cyclecounter cc;
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struct timecounter tc;
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int rx_hwtstamp_filter;
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u32 base_incval;
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u32 cycle_speed;
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int hwts_rx_en;
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int hwts_tx_en;
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struct timer_list time_keep;
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#endif
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};
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#ifdef CONFIG_FEC_PTP
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void fec_ptp_init(struct net_device *ndev, struct platform_device *pdev);
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void fec_ptp_start_cyclecounter(struct net_device *ndev);
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int fec_ptp_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd);
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#endif
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/****************************************************************************/
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#endif /* FEC_H */
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385
drivers/net/ethernet/freescale/fec_ptp.c
Normal file
385
drivers/net/ethernet/freescale/fec_ptp.c
Normal file
@ -0,0 +1,385 @@
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/*
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* Fast Ethernet Controller (ENET) PTP driver for MX6x.
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*
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/ptrace.h>
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#include <linux/errno.h>
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#include <linux/ioport.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/spinlock.h>
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#include <linux/workqueue.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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#include <linux/phy.h>
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#include <linux/fec.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_gpio.h>
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#include <linux/of_net.h>
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#include "fec.h"
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/* FEC 1588 register bits */
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#define FEC_T_CTRL_SLAVE 0x00002000
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#define FEC_T_CTRL_CAPTURE 0x00000800
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#define FEC_T_CTRL_RESTART 0x00000200
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#define FEC_T_CTRL_PERIOD_RST 0x00000030
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#define FEC_T_CTRL_PERIOD_EN 0x00000010
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#define FEC_T_CTRL_ENABLE 0x00000001
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#define FEC_T_INC_MASK 0x0000007f
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#define FEC_T_INC_OFFSET 0
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#define FEC_T_INC_CORR_MASK 0x00007f00
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#define FEC_T_INC_CORR_OFFSET 8
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#define FEC_ATIME_CTRL 0x400
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#define FEC_ATIME 0x404
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#define FEC_ATIME_EVT_OFFSET 0x408
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#define FEC_ATIME_EVT_PERIOD 0x40c
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#define FEC_ATIME_CORR 0x410
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#define FEC_ATIME_INC 0x414
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#define FEC_TS_TIMESTAMP 0x418
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#define FEC_CC_MULT (1 << 31)
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/**
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* fec_ptp_read - read raw cycle counter (to be used by time counter)
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* @cc: the cyclecounter structure
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*
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* this function reads the cyclecounter registers and is called by the
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* cyclecounter structure used to construct a ns counter from the
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* arbitrary fixed point registers
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*/
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static cycle_t fec_ptp_read(const struct cyclecounter *cc)
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{
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struct fec_enet_private *fep =
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container_of(cc, struct fec_enet_private, cc);
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u32 tempval;
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tempval = readl(fep->hwp + FEC_ATIME_CTRL);
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tempval |= FEC_T_CTRL_CAPTURE;
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writel(tempval, fep->hwp + FEC_ATIME_CTRL);
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return readl(fep->hwp + FEC_ATIME);
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}
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/**
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* fec_ptp_start_cyclecounter - create the cycle counter from hw
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* @ndev: network device
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*
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* this function initializes the timecounter and cyclecounter
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* structures for use in generated a ns counter from the arbitrary
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* fixed point cycles registers in the hardware.
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*/
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void fec_ptp_start_cyclecounter(struct net_device *ndev)
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{
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struct fec_enet_private *fep = netdev_priv(ndev);
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unsigned long flags;
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int inc;
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inc = 1000000000 / clk_get_rate(fep->clk_ptp);
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/* grab the ptp lock */
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spin_lock_irqsave(&fep->tmreg_lock, flags);
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/* 1ns counter */
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writel(inc << FEC_T_INC_OFFSET, fep->hwp + FEC_ATIME_INC);
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/* use free running count */
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writel(0, fep->hwp + FEC_ATIME_EVT_PERIOD);
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writel(FEC_T_CTRL_ENABLE, fep->hwp + FEC_ATIME_CTRL);
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memset(&fep->cc, 0, sizeof(fep->cc));
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fep->cc.read = fec_ptp_read;
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fep->cc.mask = CLOCKSOURCE_MASK(32);
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fep->cc.shift = 31;
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fep->cc.mult = FEC_CC_MULT;
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/* reset the ns time counter */
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timecounter_init(&fep->tc, &fep->cc, ktime_to_ns(ktime_get_real()));
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spin_unlock_irqrestore(&fep->tmreg_lock, flags);
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}
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/**
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* fec_ptp_adjfreq - adjust ptp cycle frequency
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* @ptp: the ptp clock structure
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* @ppb: parts per billion adjustment from base
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*
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* Adjust the frequency of the ptp cycle counter by the
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* indicated ppb from the base frequency.
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*
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* Because ENET hardware frequency adjust is complex,
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* using software method to do that.
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*/
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static int fec_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
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{
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u64 diff;
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unsigned long flags;
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int neg_adj = 0;
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struct fec_enet_private *fep =
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container_of(ptp, struct fec_enet_private, ptp_caps);
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if (ppb < 0) {
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ppb = -ppb;
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neg_adj = 1;
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}
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spin_lock_irqsave(&fep->tmreg_lock, flags);
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/*
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* dummy read to set cycle_last in tc to now.
|
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* So use adjusted mult to calculate when next call
|
||||
* timercounter_read.
|
||||
*/
|
||||
timecounter_read(&fep->tc);
|
||||
fep->cc.mult = FEC_CC_MULT;
|
||||
diff = fep->cc.mult;
|
||||
diff *= ppb;
|
||||
diff = div_u64(diff, 1000000000ULL);
|
||||
|
||||
if (neg_adj)
|
||||
fep->cc.mult -= diff;
|
||||
else
|
||||
fep->cc.mult += diff;
|
||||
|
||||
spin_unlock_irqrestore(&fep->tmreg_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* fec_ptp_adjtime
|
||||
* @ptp: the ptp clock structure
|
||||
* @delta: offset to adjust the cycle counter by
|
||||
*
|
||||
* adjust the timer by resetting the timecounter structure.
|
||||
*/
|
||||
static int fec_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
|
||||
{
|
||||
struct fec_enet_private *fep =
|
||||
container_of(ptp, struct fec_enet_private, ptp_caps);
|
||||
unsigned long flags;
|
||||
u64 now;
|
||||
|
||||
spin_lock_irqsave(&fep->tmreg_lock, flags);
|
||||
|
||||
now = timecounter_read(&fep->tc);
|
||||
now += delta;
|
||||
|
||||
/* reset the timecounter */
|
||||
timecounter_init(&fep->tc, &fep->cc, now);
|
||||
|
||||
spin_unlock_irqrestore(&fep->tmreg_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* fec_ptp_gettime
|
||||
* @ptp: the ptp clock structure
|
||||
* @ts: timespec structure to hold the current time value
|
||||
*
|
||||
* read the timecounter and return the correct value on ns,
|
||||
* after converting it into a struct timespec.
|
||||
*/
|
||||
static int fec_ptp_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
|
||||
{
|
||||
struct fec_enet_private *adapter =
|
||||
container_of(ptp, struct fec_enet_private, ptp_caps);
|
||||
u64 ns;
|
||||
u32 remainder;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&adapter->tmreg_lock, flags);
|
||||
ns = timecounter_read(&adapter->tc);
|
||||
spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
|
||||
|
||||
ts->tv_sec = div_u64_rem(ns, 1000000000ULL, &remainder);
|
||||
ts->tv_nsec = remainder;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* fec_ptp_settime
|
||||
* @ptp: the ptp clock structure
|
||||
* @ts: the timespec containing the new time for the cycle counter
|
||||
*
|
||||
* reset the timecounter to use a new base value instead of the kernel
|
||||
* wall timer value.
|
||||
*/
|
||||
static int fec_ptp_settime(struct ptp_clock_info *ptp,
|
||||
const struct timespec *ts)
|
||||
{
|
||||
struct fec_enet_private *fep =
|
||||
container_of(ptp, struct fec_enet_private, ptp_caps);
|
||||
|
||||
u64 ns;
|
||||
unsigned long flags;
|
||||
|
||||
ns = ts->tv_sec * 1000000000ULL;
|
||||
ns += ts->tv_nsec;
|
||||
|
||||
spin_lock_irqsave(&fep->tmreg_lock, flags);
|
||||
timecounter_init(&fep->tc, &fep->cc, ns);
|
||||
spin_unlock_irqrestore(&fep->tmreg_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* fec_ptp_enable
|
||||
* @ptp: the ptp clock structure
|
||||
* @rq: the requested feature to change
|
||||
* @on: whether to enable or disable the feature
|
||||
*
|
||||
*/
|
||||
static int fec_ptp_enable(struct ptp_clock_info *ptp,
|
||||
struct ptp_clock_request *rq, int on)
|
||||
{
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
/**
|
||||
* fec_ptp_hwtstamp_ioctl - control hardware time stamping
|
||||
* @ndev: pointer to net_device
|
||||
* @ifreq: ioctl data
|
||||
* @cmd: particular ioctl requested
|
||||
*/
|
||||
int fec_ptp_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd)
|
||||
{
|
||||
struct fec_enet_private *fep = netdev_priv(ndev);
|
||||
|
||||
struct hwtstamp_config config;
|
||||
|
||||
if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
|
||||
return -EFAULT;
|
||||
|
||||
/* reserved for future extensions */
|
||||
if (config.flags)
|
||||
return -EINVAL;
|
||||
|
||||
switch (config.tx_type) {
|
||||
case HWTSTAMP_TX_OFF:
|
||||
fep->hwts_tx_en = 0;
|
||||
break;
|
||||
case HWTSTAMP_TX_ON:
|
||||
fep->hwts_tx_en = 1;
|
||||
break;
|
||||
default:
|
||||
return -ERANGE;
|
||||
}
|
||||
|
||||
switch (config.rx_filter) {
|
||||
case HWTSTAMP_FILTER_NONE:
|
||||
if (fep->hwts_rx_en)
|
||||
fep->hwts_rx_en = 0;
|
||||
config.rx_filter = HWTSTAMP_FILTER_NONE;
|
||||
break;
|
||||
|
||||
default:
|
||||
/*
|
||||
* register RXMTRL must be set in order to do V1 packets,
|
||||
* therefore it is not possible to time stamp both V1 Sync and
|
||||
* Delay_Req messages and hardware does not support
|
||||
* timestamping all packets => return error
|
||||
*/
|
||||
fep->hwts_rx_en = 1;
|
||||
config.rx_filter = HWTSTAMP_FILTER_ALL;
|
||||
break;
|
||||
}
|
||||
|
||||
return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
|
||||
-EFAULT : 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* fec_time_keep - call timecounter_read every second to avoid timer overrun
|
||||
* because ENET just support 32bit counter, will timeout in 4s
|
||||
*/
|
||||
static void fec_time_keep(unsigned long _data)
|
||||
{
|
||||
struct fec_enet_private *fep = (struct fec_enet_private *)_data;
|
||||
u64 ns;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&fep->tmreg_lock, flags);
|
||||
ns = timecounter_read(&fep->tc);
|
||||
spin_unlock_irqrestore(&fep->tmreg_lock, flags);
|
||||
|
||||
mod_timer(&fep->time_keep, jiffies + HZ);
|
||||
}
|
||||
|
||||
/**
|
||||
* fec_ptp_init
|
||||
* @ndev: The FEC network adapter
|
||||
*
|
||||
* This function performs the required steps for enabling ptp
|
||||
* support. If ptp support has already been loaded it simply calls the
|
||||
* cyclecounter init routine and exits.
|
||||
*/
|
||||
|
||||
void fec_ptp_init(struct net_device *ndev, struct platform_device *pdev)
|
||||
{
|
||||
struct fec_enet_private *fep = netdev_priv(ndev);
|
||||
|
||||
fep->ptp_caps.owner = THIS_MODULE;
|
||||
snprintf(fep->ptp_caps.name, 16, "fec ptp");
|
||||
|
||||
fep->ptp_caps.max_adj = 250000000;
|
||||
fep->ptp_caps.n_alarm = 0;
|
||||
fep->ptp_caps.n_ext_ts = 0;
|
||||
fep->ptp_caps.n_per_out = 0;
|
||||
fep->ptp_caps.pps = 0;
|
||||
fep->ptp_caps.adjfreq = fec_ptp_adjfreq;
|
||||
fep->ptp_caps.adjtime = fec_ptp_adjtime;
|
||||
fep->ptp_caps.gettime = fec_ptp_gettime;
|
||||
fep->ptp_caps.settime = fec_ptp_settime;
|
||||
fep->ptp_caps.enable = fec_ptp_enable;
|
||||
|
||||
spin_lock_init(&fep->tmreg_lock);
|
||||
|
||||
fec_ptp_start_cyclecounter(ndev);
|
||||
|
||||
init_timer(&fep->time_keep);
|
||||
fep->time_keep.data = (unsigned long)fep;
|
||||
fep->time_keep.function = fec_time_keep;
|
||||
fep->time_keep.expires = jiffies + HZ;
|
||||
add_timer(&fep->time_keep);
|
||||
|
||||
fep->ptp_clock = ptp_clock_register(&fep->ptp_caps, &pdev->dev);
|
||||
if (IS_ERR(fep->ptp_clock)) {
|
||||
fep->ptp_clock = NULL;
|
||||
pr_err("ptp_clock_register failed\n");
|
||||
} else {
|
||||
pr_info("registered PHC device on %s\n", ndev->name);
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user