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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-14 22:56:41 +07:00
staging:iio:ad7887: Squash everything into one file
The recent cleanups have decimated the drivers code size by quite a bit. It is only a few hundred lines in total now and we also always build buffer support, so there really is no need to spread the driver out over multiple files. Putting everything into one file also allows to reduce the code size a bit more by removing a few lines of boilerplate code. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Lars-Peter Clausen
Jonathan Cameron
parent
bf5d2613c9
commit
65dd3d3d7a
@ -17,8 +17,6 @@ ad799x-y := ad799x_core.o
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ad799x-$(CONFIG_AD799X_RING_BUFFER) += ad799x_ring.o
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obj-$(CONFIG_AD799X) += ad799x.o
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ad7887-y := ad7887_core.o
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ad7887-$(CONFIG_IIO_BUFFER) += ad7887_ring.o
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obj-$(CONFIG_AD7887) += ad7887.o
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ad7298-y := ad7298_core.o
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@ -14,14 +14,140 @@
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#include <linux/regulator/consumer.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/triggered_buffer.h>
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#include "ad7887.h"
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#define AD7887_REF_DIS (1 << 5) /* on-chip reference disable */
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#define AD7887_DUAL (1 << 4) /* dual-channel mode */
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#define AD7887_CH_AIN1 (1 << 3) /* convert on channel 1, DUAL=1 */
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#define AD7887_CH_AIN0 (0 << 3) /* convert on channel 0, DUAL=0,1 */
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#define AD7887_PM_MODE1 (0) /* CS based shutdown */
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#define AD7887_PM_MODE2 (1) /* full on */
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#define AD7887_PM_MODE3 (2) /* auto shutdown after conversion */
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#define AD7887_PM_MODE4 (3) /* standby mode */
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enum ad7887_channels {
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AD7887_CH0,
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AD7887_CH0_CH1,
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AD7887_CH1,
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};
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#define RES_MASK(bits) ((1 << (bits)) - 1)
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/**
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* struct ad7887_chip_info - chip specifc information
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* @int_vref_mv: the internal reference voltage
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* @channel: channel specification
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*/
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struct ad7887_chip_info {
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u16 int_vref_mv;
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struct iio_chan_spec channel[3];
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};
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struct ad7887_state {
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struct spi_device *spi;
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const struct ad7887_chip_info *chip_info;
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struct regulator *reg;
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struct spi_transfer xfer[4];
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struct spi_message msg[3];
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struct spi_message *ring_msg;
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unsigned char tx_cmd_buf[8];
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/*
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* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache lines.
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* Buffer needs to be large enough to hold two 16 bit samples and a
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* 64 bit aligned 64 bit timestamp.
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*/
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unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)]
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____cacheline_aligned;
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};
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enum ad7887_supported_device_ids {
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ID_AD7887
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};
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static int ad7887_ring_preenable(struct iio_dev *indio_dev)
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{
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struct ad7887_state *st = iio_priv(indio_dev);
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int ret;
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ret = iio_sw_buffer_preenable(indio_dev);
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if (ret < 0)
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return ret;
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/* We know this is a single long so can 'cheat' */
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switch (*indio_dev->active_scan_mask) {
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case (1 << 0):
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st->ring_msg = &st->msg[AD7887_CH0];
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break;
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case (1 << 1):
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st->ring_msg = &st->msg[AD7887_CH1];
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/* Dummy read: push CH1 setting down to hardware */
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spi_sync(st->spi, st->ring_msg);
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break;
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case ((1 << 1) | (1 << 0)):
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st->ring_msg = &st->msg[AD7887_CH0_CH1];
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break;
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}
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return 0;
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}
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static int ad7887_ring_postdisable(struct iio_dev *indio_dev)
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{
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struct ad7887_state *st = iio_priv(indio_dev);
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/* dummy read: restore default CH0 settin */
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return spi_sync(st->spi, &st->msg[AD7887_CH0]);
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}
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/**
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* ad7887_trigger_handler() bh of trigger launched polling to ring buffer
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*
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* Currently there is no option in this driver to disable the saving of
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* timestamps within the ring.
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**/
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static irqreturn_t ad7887_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct ad7887_state *st = iio_priv(indio_dev);
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s64 time_ns;
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int b_sent;
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b_sent = spi_sync(st->spi, st->ring_msg);
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if (b_sent)
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goto done;
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time_ns = iio_get_time_ns();
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if (indio_dev->scan_timestamp)
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memcpy(st->data + indio_dev->scan_bytes - sizeof(s64),
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&time_ns, sizeof(time_ns));
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iio_push_to_buffer(indio_dev->buffer, st->data);
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done:
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = {
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.preenable = &ad7887_ring_preenable,
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.postenable = &iio_triggered_buffer_postenable,
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.predisable = &iio_triggered_buffer_predisable,
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.postdisable = &ad7887_ring_postdisable,
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};
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static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch)
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{
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int ret = spi_sync(st->spi, &st->msg[ch]);
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@ -192,7 +318,8 @@ static int __devinit ad7887_probe(struct spi_device *spi)
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indio_dev->num_channels = 2;
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}
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ret = ad7887_register_ring_funcs_and_init(indio_dev);
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ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
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&ad7887_trigger_handler, &ad7887_ring_setup_ops);
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if (ret)
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goto error_disable_reg;
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@ -202,7 +329,7 @@ static int __devinit ad7887_probe(struct spi_device *spi)
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return 0;
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error_unregister_ring:
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ad7887_ring_cleanup(indio_dev);
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iio_triggered_buffer_cleanup(indio_dev);
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error_disable_reg:
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if (st->reg)
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regulator_disable(st->reg);
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@ -221,7 +348,7 @@ static int __devexit ad7887_remove(struct spi_device *spi)
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struct ad7887_state *st = iio_priv(indio_dev);
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iio_device_unregister(indio_dev);
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ad7887_ring_cleanup(indio_dev);
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iio_triggered_buffer_cleanup(indio_dev);
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if (st->reg) {
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regulator_disable(st->reg);
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regulator_put(st->reg);
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@ -8,23 +8,6 @@
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#ifndef IIO_ADC_AD7887_H_
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#define IIO_ADC_AD7887_H_
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#define AD7887_REF_DIS (1 << 5) /* on-chip reference disable */
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#define AD7887_DUAL (1 << 4) /* dual-channel mode */
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#define AD7887_CH_AIN1 (1 << 3) /* convert on channel 1, DUAL=1 */
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#define AD7887_CH_AIN0 (0 << 3) /* convert on channel 0, DUAL=0,1 */
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#define AD7887_PM_MODE1 (0) /* CS based shutdown */
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#define AD7887_PM_MODE2 (1) /* full on */
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#define AD7887_PM_MODE3 (2) /* auto shutdown after conversion */
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#define AD7887_PM_MODE4 (3) /* standby mode */
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enum ad7887_channels {
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AD7887_CH0,
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AD7887_CH0_CH1,
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AD7887_CH1,
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};
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#define RES_MASK(bits) ((1 << (bits)) - 1) /* TODO: move this into a common header */
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/*
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* TODO: struct ad7887_platform_data needs to go into include/linux/iio
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*/
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@ -46,53 +29,4 @@ struct ad7887_platform_data {
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bool use_onchip_ref;
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};
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/**
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* struct ad7887_chip_info - chip specifc information
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* @int_vref_mv: the internal reference voltage
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* @channel: channel specification
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*/
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struct ad7887_chip_info {
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u16 int_vref_mv;
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struct iio_chan_spec channel[3];
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};
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struct ad7887_state {
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struct spi_device *spi;
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const struct ad7887_chip_info *chip_info;
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struct regulator *reg;
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struct spi_transfer xfer[4];
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struct spi_message msg[3];
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struct spi_message *ring_msg;
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unsigned char tx_cmd_buf[8];
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/*
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* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache lines.
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* Buffer needs to be large enough to hold two 16 bit samples and a
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* 64 bit aligned 64 bit timestamp.
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*/
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unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)]
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____cacheline_aligned;
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};
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enum ad7887_supported_device_ids {
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ID_AD7887
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};
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#ifdef CONFIG_IIO_BUFFER
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int ad7887_register_ring_funcs_and_init(struct iio_dev *indio_dev);
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void ad7887_ring_cleanup(struct iio_dev *indio_dev);
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#else /* CONFIG_IIO_BUFFER */
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static inline int
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ad7887_register_ring_funcs_and_init(struct iio_dev *indio_dev)
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{
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return 0;
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}
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static inline void ad7887_ring_cleanup(struct iio_dev *indio_dev)
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{
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}
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#endif /* CONFIG_IIO_BUFFER */
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#endif /* IIO_ADC_AD7887_H_ */
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@ -1,111 +0,0 @@
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/*
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* Copyright 2010-2012 Analog Devices Inc.
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* Copyright (C) 2008 Jonathan Cameron
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*
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* Licensed under the GPL-2.
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*
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* ad7887_ring.c
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*/
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/spi/spi.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/triggered_buffer.h>
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#include "ad7887.h"
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/**
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* ad7887_ring_preenable() setup the parameters of the ring before enabling
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*
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* The complex nature of the setting of the nuber of bytes per datum is due
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* to this driver currently ensuring that the timestamp is stored at an 8
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* byte boundary.
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**/
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static int ad7887_ring_preenable(struct iio_dev *indio_dev)
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{
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struct ad7887_state *st = iio_priv(indio_dev);
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int ret;
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ret = iio_sw_buffer_preenable(indio_dev);
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if (ret < 0)
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return ret;
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/* We know this is a single long so can 'cheat' */
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switch (*indio_dev->active_scan_mask) {
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case (1 << 0):
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st->ring_msg = &st->msg[AD7887_CH0];
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break;
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case (1 << 1):
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st->ring_msg = &st->msg[AD7887_CH1];
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/* Dummy read: push CH1 setting down to hardware */
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spi_sync(st->spi, st->ring_msg);
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break;
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case ((1 << 1) | (1 << 0)):
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st->ring_msg = &st->msg[AD7887_CH0_CH1];
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break;
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}
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return 0;
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}
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static int ad7887_ring_postdisable(struct iio_dev *indio_dev)
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{
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struct ad7887_state *st = iio_priv(indio_dev);
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/* dummy read: restore default CH0 settin */
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return spi_sync(st->spi, &st->msg[AD7887_CH0]);
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}
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/**
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* ad7887_trigger_handler() bh of trigger launched polling to ring buffer
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*
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* Currently there is no option in this driver to disable the saving of
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* timestamps within the ring.
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**/
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static irqreturn_t ad7887_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct ad7887_state *st = iio_priv(indio_dev);
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s64 time_ns;
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int b_sent;
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b_sent = spi_sync(st->spi, st->ring_msg);
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if (b_sent)
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goto done;
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time_ns = iio_get_time_ns();
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if (indio_dev->scan_timestamp)
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memcpy(st->data + indio_dev->scan_bytes - sizeof(s64),
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&time_ns, sizeof(time_ns));
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iio_push_to_buffer(indio_dev->buffer, st->data);
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done:
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = {
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.preenable = &ad7887_ring_preenable,
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.postenable = &iio_triggered_buffer_postenable,
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.predisable = &iio_triggered_buffer_predisable,
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.postdisable = &ad7887_ring_postdisable,
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};
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int ad7887_register_ring_funcs_and_init(struct iio_dev *indio_dev)
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{
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return iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
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&ad7887_trigger_handler, &ad7887_ring_setup_ops);
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}
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void ad7887_ring_cleanup(struct iio_dev *indio_dev)
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{
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iio_triggered_buffer_cleanup(indio_dev);
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}
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