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ARM: SoC fixes for v5.10

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This is a fairly large set of bug fixes on top of -rc1,
 as most of them were ready but didn't quite make it into
 the last-minute pull requests for the merge window.
 
 Allwinner:
 	Fix for incorrect CPU overtemperature limit
 
 Amlogic:
 	Multiple smaller DT bugfixes, and missing device nodes
 
 Marvell EBU:
 	Add missing aliases for ethernet switch ports on
 	espressobin board
 
 Marvell MMP:
 	One DTC warning fix
 	one bugfix for camera interface power-down
 
 NXP i.MX:
 	Re-enable the GPIO driver on all defconfigs
 
 ST STM32MP1:
 	Fix random crashes from incorrect voltage settings
 
 Synaptics Berlin:
 	Enable the correct hardware timer driver
 
 Texas Instruments K2G:
 	fix a boot regression in the power domain code
 
 TEE drivers:
 	Fix regression in TEE "login" method
 
 SCMI drivers:
 	multiple code fixes for corner cases in newly added code
 
 MAINTAINERS file:
 	Move Kukjin Kim and Sangbeom Kim used to work on
 	Samsung Exynos.
 	Masahiro Yamada is stepping down as Uniphier maintainer
 
 I did not include a series of patches that work around a
 regression caused by a bugfix in an ethernet phy driver
 that resulted in an inadvertent DT binding change. This is
 still under discussion.
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Merge tag 'arm-soc-fixes-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "This is a fairly large set of bug fixes on top of -rc1, as most of
  them were ready but didn't quite make it into the last-minute pull
  requests for the merge window.

  Allwinner:
   - fix for incorrect CPU overtemperature limit

  Amlogic:
   - multiple smaller DT bugfixes, and missing device nodes

  Marvell EBU:
   - add missing aliases for ethernet switch ports on espressobin board

  Marvell MMP:
   - DTC warning fix
   - bugfix for camera interface power-down

  NXP i.MX:
   - re-enable the GPIO driver on all defconfigs

  ST STM32MP1:
   - fix random crashes from incorrect voltage settings

  Synaptics Berlin:
   - enable the correct hardware timer driver

  Texas Instruments K2G:
   - fix a boot regression in the power domain code

  TEE drivers:
   - fix regression in TEE "login" method

  SCMI drivers:
   - multiple code fixes for corner cases in newly added code

  MAINTAINERS file:
   - move Kukjin Kim and Sangbeom Kim to credits (used to work on
     Samsung Exynos)
   - Masahiro Yamada is stepping down as Uniphier maintainer

  I did not include a series of patches that work around a regression
  caused by a bugfix in an ethernet phy driver that resulted in an
  inadvertent DT binding change. This is still under discussion"

* tag 'arm-soc-fixes-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (31 commits)
  soc: ti: ti_sci_pm_domains: check for proper args count in xlate
  ARM: dts: stm32: Describe Vin power supply on stm32mp157c-edx board
  ARM: dts: stm32: Describe Vin power supply on stm32mp15xx-dkx board
  ARM: multi_v5_defconfig: Select CONFIG_GPIO_MXC
  ARM: imx_v4_v5_defconfig: Select CONFIG_GPIO_MXC
  ARM: dts: mmp2-olpc-xo-1-75: Use plural form of "-gpios"
  ARM: dts: mmp3: Add power domain for the camera
  arm64: berlin: Select DW_APB_TIMER_OF
  dt-bindings: sram: sunxi-sram: add V3s compatible string
  MAINTAINERS: Move Sangbeom Kim to credits
  MAINTAINERS: Move Kukjin Kim to credits
  MAINTAINERS: step down as maintainer of UniPhier SoCs and Denali driver
  ARM: multi_v7_defconfig: Build in CONFIG_GPIO_MXC by default
  ARM: imx_v6_v7_defconfig: Build in CONFIG_GPIO_MXC by default
  arm64: defconfig: Build in CONFIG_GPIO_MXC by default
  arm64: dts: meson: odroid-n2 plus: fix vddcpu_a pwm
  ARM: dts: meson8: remove two invalid interrupt lines from the GPU node
  arm64: dts: amlogic: add missing ethernet reset ID
  firmware: arm_scmi: Fix duplicate workqueue name
  firmware: arm_scmi: Fix locking in notifications
  ...
This commit is contained in:
Linus Torvalds 2020-10-30 13:06:07 -07:00
commit 65b55d4c85
34 changed files with 186 additions and 42 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
CREDITS
View File

@ -1910,6 +1910,15 @@ S: 660 Harvard Ave. #7
S: Santa Clara, CA 95051
S: USA
N: Kukjin Kim
E: kgene@kernel.org
D: Samsung S3C, S5P and Exynos ARM architectures
N: Sangbeom Kim
E: sbkim73@samsung.com
D: Samsung SoC Audio (ASoC) drivers
D: Samsung PMIC (RTC, regulators, MFD) drivers
N: Russell King
E: rmk@arm.linux.org.uk
D: Linux/arm integrator, maintainer & hacker

3
Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml
View File

@ -33,6 +33,9 @@ properties:
- const: allwinner,sun4i-a10-system-control
- const: allwinner,sun8i-a23-system-control
- const: allwinner,sun8i-h3-system-control
- items:
- const: allwinner,sun8i-v3s-system-control
- const: allwinner,sun8i-h3-system-control
- items:
- const: allwinner,sun8i-r40-system-control
- const: allwinner,sun4i-a10-system-control

11
MAINTAINERS
View File

@ -2375,7 +2375,6 @@ F: sound/soc/rockchip/
N: rockchip
ARM/SAMSUNG EXYNOS ARM ARCHITECTURES
M: Kukjin Kim <kgene@kernel.org>
M: Krzysztof Kozlowski <krzk@kernel.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: linux-samsung-soc@vger.kernel.org
@ -2642,10 +2641,8 @@ F: drivers/pinctrl/visconti/
N: visconti
ARM/UNIPHIER ARCHITECTURE
M: Masahiro Yamada <yamada.masahiro@socionext.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier.git
S: Orphan
F: Documentation/devicetree/bindings/arm/socionext/uniphier.yaml
F: Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml
F: Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml
@ -5006,9 +5003,8 @@ T: git git://linuxtv.org/media_tree.git
F: drivers/media/platform/sti/delta
DENALI NAND DRIVER
M: Masahiro Yamada <yamada.masahiro@socionext.com>
L: linux-mtd@lists.infradead.org
S: Supported
S: Orphan
F: drivers/mtd/nand/raw/denali*
DESIGNWARE EDMA CORE IP DRIVER
@ -15372,7 +15368,6 @@ F: security/safesetid/
SAMSUNG AUDIO (ASoC) DRIVERS
M: Krzysztof Kozlowski <krzk@kernel.org>
M: Sangbeom Kim <sbkim73@samsung.com>
M: Sylwester Nawrocki <s.nawrocki@samsung.com>
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
S: Supported
@ -15407,7 +15402,6 @@ S: Maintained
F: drivers/platform/x86/samsung-laptop.c
SAMSUNG MULTIFUNCTION PMIC DEVICE DRIVERS
M: Sangbeom Kim <sbkim73@samsung.com>
M: Krzysztof Kozlowski <krzk@kernel.org>
M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
L: linux-kernel@vger.kernel.org
@ -15489,7 +15483,6 @@ F: include/linux/clk/samsung.h
F: include/linux/platform_data/clk-s3c2410.h
SAMSUNG SPI DRIVERS
M: Kukjin Kim <kgene@kernel.org>
M: Krzysztof Kozlowski <krzk@kernel.org>
M: Andi Shyti <andi@etezian.org>
L: linux-spi@vger.kernel.org

4
arch/arm/boot/dts/mmp2-olpc-xo-1-75.dts
View File

@ -227,12 +227,12 @@ &ssp3 {
/delete-property/ #size-cells;
spi-slave;
status = "okay";
ready-gpio = <&gpio 125 GPIO_ACTIVE_HIGH>;
ready-gpios = <&gpio 125 GPIO_ACTIVE_HIGH>;
slave {
compatible = "olpc,xo1.75-ec";
spi-cpha;
cmd-gpio = <&gpio 155 GPIO_ACTIVE_HIGH>;
cmd-gpios = <&gpio 155 GPIO_ACTIVE_HIGH>;
};
};

2
arch/arm/boot/dts/mmp3.dtsi
View File

@ -296,6 +296,7 @@ camera0: camera@d420a000 {
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&soc_clocks MMP2_CLK_CCIC0>;
clock-names = "axi";
power-domains = <&soc_clocks MMP3_POWER_DOMAIN_CAMERA>;
#clock-cells = <0>;
clock-output-names = "mclk";
status = "disabled";
@ -307,6 +308,7 @@ camera1: camera@d420a800 {
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&soc_clocks MMP2_CLK_CCIC1>;
clock-names = "axi";
power-domains = <&soc_clocks MMP3_POWER_DOMAIN_CAMERA>;
#clock-cells = <0>;
clock-output-names = "mclk";
status = "disabled";

15
arch/arm/boot/dts/stm32mp157c-ed1.dts
View File

@ -89,6 +89,14 @@ sd_switch: regulator-sd_switch {
states = <1800000 0x1>,
<2900000 0x0>;
};
vin: vin {
compatible = "regulator-fixed";
regulator-name = "vin";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
};
&adc {
@ -150,11 +158,18 @@ pmic: stpmic@33 {
regulators {
compatible = "st,stpmic1-regulators";
buck1-supply = <&vin>;
buck2-supply = <&vin>;
buck3-supply = <&vin>;
buck4-supply = <&vin>;
ldo1-supply = <&v3v3>;
ldo2-supply = <&v3v3>;
ldo3-supply = <&vdd_ddr>;
ldo4-supply = <&vin>;
ldo5-supply = <&v3v3>;
ldo6-supply = <&v3v3>;
vref_ddr-supply = <&vin>;
boost-supply = <&vin>;
pwr_sw1-supply = <&bst_out>;
pwr_sw2-supply = <&bst_out>;

17
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
View File

@ -80,6 +80,14 @@ sound {
dais = <&sai2a_port &sai2b_port &i2s2_port>;
status = "okay";
};
vin: vin {
compatible = "regulator-fixed";
regulator-name = "vin";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
};
&adc {
@ -240,9 +248,18 @@ pmic: stpmic@33 {
regulators {
compatible = "st,stpmic1-regulators";
buck1-supply = <&vin>;
buck2-supply = <&vin>;
buck3-supply = <&vin>;
buck4-supply = <&vin>;
ldo1-supply = <&v3v3>;
ldo2-supply = <&vin>;
ldo3-supply = <&vdd_ddr>;
ldo4-supply = <&vin>;
ldo5-supply = <&vin>;
ldo6-supply = <&v3v3>;
vref_ddr-supply = <&vin>;
boost-supply = <&vin>;
pwr_sw1-supply = <&bst_out>;
pwr_sw2-supply = <&bst_out>;

2
arch/arm/boot/dts/sun4i-a10.dtsi
View File

@ -143,7 +143,7 @@ map0 {
trips {
cpu_alert0: cpu-alert0 {
/* milliCelsius */
temperature = <850000>;
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};

1
arch/arm/configs/imx_v4_v5_defconfig
View File

@ -93,6 +93,7 @@ CONFIG_SPI=y
CONFIG_SPI_IMX=y
CONFIG_SPI_SPIDEV=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_MXC=y
CONFIG_W1=y
CONFIG_W1_MASTER_MXC=y
CONFIG_W1_SLAVE_THERM=y

1
arch/arm/configs/imx_v6_v7_defconfig
View File

@ -217,6 +217,7 @@ CONFIG_GPIO_PCA953X=y
CONFIG_GPIO_PCF857X=y
CONFIG_GPIO_STMPE=y
CONFIG_GPIO_74X164=y
CONFIG_GPIO_MXC=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_RESET_SYSCON_POWEROFF=y

1
arch/arm/configs/multi_v5_defconfig
View File

@ -166,6 +166,7 @@ CONFIG_SPI_IMX=y
CONFIG_SPI_ORION=y
CONFIG_GPIO_ASPEED=m
CONFIG_GPIO_ASPEED_SGPIO=y
CONFIG_GPIO_MXC=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO=y
CONFIG_POWER_RESET_QNAP=y

1
arch/arm/configs/multi_v7_defconfig
View File

@ -465,6 +465,7 @@ CONFIG_GPIO_PALMAS=y
CONFIG_GPIO_TPS6586X=y
CONFIG_GPIO_TPS65910=y
CONFIG_GPIO_TWL4030=y
CONFIG_GPIO_MXC=y
CONFIG_POWER_AVS=y
CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_POWER_RESET_AS3722=y

7
arch/arm/mach-mvebu/coherency_ll.S
View File

@ -35,13 +35,8 @@ ENTRY(ll_get_coherency_base)
/*
* MMU is disabled, use the physical address of the coherency
* base address. However, if the coherency fabric isn't mapped
* (i.e its virtual address is zero), it means coherency is
* not enabled, so we return 0.
* base address, (or 0x0 if the coherency fabric is not mapped)
*/
ldr r1, =coherency_base
cmp r1, #0
beq 2f
adr r1, 3f
ldr r3, [r1]
ldr r1, [r1, r3]

1
arch/arm64/Kconfig.platforms
View File

@ -54,6 +54,7 @@ config ARCH_BCM_IPROC
config ARCH_BERLIN
bool "Marvell Berlin SoC Family"
select DW_APB_ICTL
select DW_APB_TIMER_OF
select GPIOLIB
select PINCTRL
help

6
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
View File

@ -584,3 +584,9 @@ &uart_AO {
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
};
&usb {
status = "okay";
dr_mode = "otg";
vbus-supply = <&usb_pwr>;
};

52
arch/arm64/boot/dts/amlogic/meson-axg.dtsi
View File

@ -171,6 +171,46 @@ soc {
#size-cells = <2>;
ranges;
usb: usb@ffe09080 {
compatible = "amlogic,meson-axg-usb-ctrl";
reg = <0x0 0xffe09080 0x0 0x20>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
clock-names = "usb_ctrl", "ddr";
resets = <&reset RESET_USB_OTG>;
dr_mode = "otg";
phys = <&usb2_phy1>;
phy-names = "usb2-phy1";
dwc2: usb@ff400000 {
compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
reg = <0x0 0xff400000 0x0 0x40000>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc CLKID_USB1>;
clock-names = "otg";
phys = <&usb2_phy1>;
dr_mode = "peripheral";
g-rx-fifo-size = <192>;
g-np-tx-fifo-size = <128>;
g-tx-fifo-size = <128 128 16 16 16>;
};
dwc3: usb@ff500000 {
compatible = "snps,dwc3";
reg = <0x0 0xff500000 0x0 0x100000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
maximum-speed = "high-speed";
snps,dis_u2_susphy_quirk;
};
};
ethmac: ethernet@ff3f0000 {
compatible = "amlogic,meson-axg-dwmac",
"snps,dwmac-3.70a",
@ -187,6 +227,8 @@ ethmac: ethernet@ff3f0000 {
"timing-adjustment";
rx-fifo-depth = <4096>;
tx-fifo-depth = <2048>;
resets = <&reset RESET_ETHERNET>;
reset-names = "stmmaceth";
status = "disabled";
};
@ -1734,6 +1776,16 @@ sd_emmc_c: mmc@7000 {
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_SD_EMMC_C>;
};
usb2_phy1: phy@9020 {
compatible = "amlogic,meson-gxl-usb2-phy";
#phy-cells = <0>;
reg = <0x0 0x9020 0x0 0x20>;
clocks = <&clkc CLKID_USB>;
clock-names = "phy";
resets = <&reset RESET_USB_OTG>;
reset-names = "phy";
};
};
sram: sram@fffc0000 {

6
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
View File

@ -209,7 +209,7 @@ map {
};
ethmac: ethernet@ff3f0000 {
compatible = "amlogic,meson-axg-dwmac",
compatible = "amlogic,meson-g12a-dwmac",
"snps,dwmac-3.70a",
"snps,dwmac";
reg = <0x0 0xff3f0000 0x0 0x10000>,
@ -224,6 +224,8 @@ ethmac: ethernet@ff3f0000 {
"timing-adjustment";
rx-fifo-depth = <4096>;
tx-fifo-depth = <2048>;
resets = <&reset RESET_ETHERNET>;
reset-names = "stmmaceth";
status = "disabled";
mdio0: mdio {
@ -282,6 +284,8 @@ apb_efuse: bus@30000 {
hwrng: rng@218 {
compatible = "amlogic,meson-rng";
reg = <0x0 0x218 0x0 0x4>;
clocks = <&clkc CLKID_RNG0>;
clock-names = "core";
};
};

2
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts
View File

@ -19,7 +19,7 @@ &vddcpu_a {
regulator-min-microvolt = <680000>;
regulator-max-microvolt = <1040000>;
pwms = <&pwm_AO_cd 1 1500 0>;
pwms = <&pwm_ab 0 1500 0>;
};
&vddcpu_b {

3
arch/arm64/boot/dts/amlogic/meson-gx.dtsi
View File

@ -13,6 +13,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/meson-gxbb-power.h>
#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
#include <dt-bindings/thermal/thermal.h>
/ {
@ -575,6 +576,8 @@ ethmac: ethernet@c9410000 {
interrupt-names = "macirq";
rx-fifo-depth = <4096>;
tx-fifo-depth = <2048>;
resets = <&reset RESET_ETHERNET>;
reset-names = "stmmaceth";
power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>;
status = "disabled";
};

10
arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7-emmc.dts
View File

@ -20,17 +20,23 @@ / {
compatible = "globalscale,espressobin-v7-emmc", "globalscale,espressobin-v7",
"globalscale,espressobin", "marvell,armada3720",
"marvell,armada3710";
aliases {
/* ethernet1 is wan port */
ethernet1 = &switch0port3;
ethernet3 = &switch0port1;
};
};
&switch0 {
ports {
port@1 {
switch0port1: port@1 {
reg = <1>;
label = "lan1";
phy-handle = <&switch0phy0>;
};
port@3 {
switch0port3: port@3 {
reg = <3>;
label = "wan";
phy-handle = <&switch0phy2>;

10
arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7.dts
View File

@ -19,17 +19,23 @@ / {
model = "Globalscale Marvell ESPRESSOBin Board V7";
compatible = "globalscale,espressobin-v7", "globalscale,espressobin",
"marvell,armada3720", "marvell,armada3710";
aliases {
/* ethernet1 is wan port */
ethernet1 = &switch0port3;
ethernet3 = &switch0port1;
};
};
&switch0 {
ports {
port@1 {
switch0port1: port@1 {
reg = <1>;
label = "lan1";
phy-handle = <&switch0phy0>;
};
port@3 {
switch0port3: port@3 {
reg = <3>;
label = "wan";
phy-handle = <&switch0phy2>;

12
arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
View File

@ -13,6 +13,10 @@
/ {
aliases {
ethernet0 = &eth0;
/* for dsa slave device */
ethernet1 = &switch0port1;
ethernet2 = &switch0port2;
ethernet3 = &switch0port3;
serial0 = &uart0;
serial1 = &uart1;
};
@ -120,7 +124,7 @@ ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
switch0port0: port@0 {
reg = <0>;
label = "cpu";
ethernet = <&eth0>;
@ -131,19 +135,19 @@ fixed-link {
};
};
port@1 {
switch0port1: port@1 {
reg = <1>;
label = "wan";
phy-handle = <&switch0phy0>;
};
port@2 {
switch0port2: port@2 {
reg = <2>;
label = "lan0";
phy-handle = <&switch0phy1>;
};
port@3 {
switch0port3: port@3 {
reg = <3>;
label = "lan1";
phy-handle = <&switch0phy2>;

1
arch/arm64/configs/defconfig
View File

@ -500,6 +500,7 @@ CONFIG_GPIO_ALTERA=m
CONFIG_GPIO_DWAPB=y
CONFIG_GPIO_MB86S7X=y
CONFIG_GPIO_MPC8XXX=y
CONFIG_GPIO_MXC=y
CONFIG_GPIO_PL061=y
CONFIG_GPIO_RCAR=y
CONFIG_GPIO_UNIPHIER=y

2
drivers/firmware/arm_scmi/base.c
View File

@ -197,6 +197,8 @@ static int scmi_base_implementation_list_get(const struct scmi_handle *handle,
protocols_imp[tot_num_ret + loop] = *(list + loop);
tot_num_ret += loop_num_ret;
scmi_reset_rx_to_maxsz(handle, t);
} while (loop_num_ret);
scmi_xfer_put(handle, t);

2
drivers/firmware/arm_scmi/clock.c
View File

@ -192,6 +192,8 @@ scmi_clock_describe_rates_get(const struct scmi_handle *handle, u32 clk_id,
}
tot_rate_cnt += num_returned;
scmi_reset_rx_to_maxsz(handle, t);
/*
* check for both returned and remaining to avoid infinite
* loop due to buggy firmware

2
drivers/firmware/arm_scmi/common.h
View File

@ -147,6 +147,8 @@ int scmi_do_xfer_with_response(const struct scmi_handle *h,
struct scmi_xfer *xfer);
int scmi_xfer_get_init(const struct scmi_handle *h, u8 msg_id, u8 prot_id,
size_t tx_size, size_t rx_size, struct scmi_xfer **p);
void scmi_reset_rx_to_maxsz(const struct scmi_handle *handle,
struct scmi_xfer *xfer);
int scmi_handle_put(const struct scmi_handle *handle);
struct scmi_handle *scmi_handle_get(struct device *dev);
void scmi_set_handle(struct scmi_device *scmi_dev);

8
drivers/firmware/arm_scmi/driver.c
View File

@ -402,6 +402,14 @@ int scmi_do_xfer(const struct scmi_handle *handle, struct scmi_xfer *xfer)
return ret;
}
void scmi_reset_rx_to_maxsz(const struct scmi_handle *handle,
struct scmi_xfer *xfer)
{
struct scmi_info *info = handle_to_scmi_info(handle);
xfer->rx.len = info->desc->max_msg_size;
}
#define SCMI_MAX_RESPONSE_TIMEOUT (2 * MSEC_PER_SEC)
/**

22
drivers/firmware/arm_scmi/notify.c
View File

@ -1403,15 +1403,21 @@ static void scmi_protocols_late_init(struct work_struct *work)
"finalized PENDING handler - key:%X\n",
hndl->key);
ret = scmi_event_handler_enable_events(hndl);
if (ret) {
dev_dbg(ni->handle->dev,
"purging INVALID handler - key:%X\n",
hndl->key);
scmi_put_active_handler(ni, hndl);
}
} else {
ret = scmi_valid_pending_handler(ni, hndl);
}
if (ret) {
dev_dbg(ni->handle->dev,
"purging PENDING handler - key:%X\n",
hndl->key);
/* this hndl can be only a pending one */
scmi_put_handler_unlocked(ni, hndl);
if (ret) {
dev_dbg(ni->handle->dev,
"purging PENDING handler - key:%X\n",
hndl->key);
/* this hndl can be only a pending one */
scmi_put_handler_unlocked(ni, hndl);
}
}
}
mutex_unlock(&ni->pending_mtx);
@ -1468,7 +1474,7 @@ int scmi_notification_init(struct scmi_handle *handle)
ni->gid = gid;
ni->handle = handle;
ni->notify_wq = alloc_workqueue("scmi_notify",
ni->notify_wq = alloc_workqueue(dev_name(handle->dev),
WQ_UNBOUND | WQ_FREEZABLE | WQ_SYSFS,
0);
if (!ni->notify_wq)

2
drivers/firmware/arm_scmi/perf.c
View File

@ -304,6 +304,8 @@ scmi_perf_describe_levels_get(const struct scmi_handle *handle, u32 domain,
}
tot_opp_cnt += num_returned;
scmi_reset_rx_to_maxsz(handle, t);
/*
* check for both returned and remaining to avoid infinite
* loop due to buggy firmware

4
drivers/firmware/arm_scmi/reset.c
View File

@ -36,9 +36,7 @@ struct scmi_msg_reset_domain_reset {
#define EXPLICIT_RESET_ASSERT BIT(1)
#define ASYNCHRONOUS_RESET BIT(2)
__le32 reset_state;
#define ARCH_RESET_TYPE BIT(31)
#define COLD_RESET_STATE BIT(0)
#define ARCH_COLD_RESET (ARCH_RESET_TYPE | COLD_RESET_STATE)
#define ARCH_COLD_RESET 0
};
struct scmi_msg_reset_notify {

2
drivers/firmware/arm_scmi/sensors.c
View File

@ -166,6 +166,8 @@ static int scmi_sensor_description_get(const struct scmi_handle *handle,
}
desc_index += num_returned;
scmi_reset_rx_to_maxsz(handle, t);
/*
* check for both returned and remaining to avoid infinite
* loop due to buggy firmware

2
drivers/firmware/arm_scmi/smc.c
View File

@ -149,6 +149,6 @@ static const struct scmi_transport_ops scmi_smc_ops = {
const struct scmi_desc scmi_smc_desc = {
.ops = &scmi_smc_ops,
.max_rx_timeout_ms = 30,
.max_msg = 1,
.max_msg = 20,
.max_msg_size = 128,
};

2
drivers/soc/ti/ti_sci_pm_domains.c
View File

@ -91,7 +91,7 @@ static struct generic_pm_domain *ti_sci_pd_xlate(
struct genpd_onecell_data *genpd_data = data;
unsigned int idx = genpdspec->args[0];
if (genpdspec->args_count < 2)
if (genpdspec->args_count != 1 && genpdspec->args_count != 2)
return ERR_PTR(-EINVAL);
if (idx >= genpd_data->num_domains) {

3
drivers/tee/tee_core.c
View File

@ -200,7 +200,8 @@ int tee_session_calc_client_uuid(uuid_t *uuid, u32 connection_method,
int name_len;
int rc;
if (connection_method == TEE_IOCTL_LOGIN_PUBLIC) {
if (connection_method == TEE_IOCTL_LOGIN_PUBLIC ||
connection_method == TEE_IOCTL_LOGIN_REE_KERNEL) {
/* Nil UUID to be passed to TEE environment */
uuid_copy(uuid, &uuid_null);
return 0;