AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-11-25 12:10:53 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

[SPARC]: Migration cost tune up in sparc smp.

Browse Source 
This patch sets the max_cache_size value required to tune up
scheduler in SMP systems. Otherwise, the calculated
migration_cost is too high and task scheduling may lock up.

Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Krzysztof Helt 2006-06-10 22:03:43 -07:00 committed by David S. Miller
parent 9145bcf635
commit 650fb83822
1 changed files with 11 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
arch/sparc/kernel/smp.c
View File

@ -69,6 +69,17 @@ void __init smp_store_cpu_info(int id)
"clock-frequency", 0);
cpu_data(id).prom_node = cpu_node;
cpu_data(id).mid = cpu_get_hwmid(cpu_node);
/* this is required to tune the scheduler correctly */
/* is it possible to have CPUs with different cache sizes? */
if (id == boot_cpu_id) {
int cache_line,cache_nlines;
cache_line = 0x20;
cache_line = prom_getintdefault(cpu_node, "ecache-line-size", cache_line);
cache_nlines = 0x8000;
cache_nlines = prom_getintdefault(cpu_node, "ecache-nlines", cache_nlines);
max_cache_size = cache_line * cache_nlines;
}
if (cpu_data(id).mid < 0)
panic("No MID found for CPU%d at node 0x%08d", id, cpu_node);
}