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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ARM: dts: uniphier: add clocks/resets to EHCI nodes of sLD3 SoC
Now, the clock/reset controller driver is available for this SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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@ -242,6 +242,9 @@ usb0: usb@5a800100 {
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status = "disabled";
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reg = <0x5a800100 0x100>;
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interrupts = <0 80 4>;
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clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>;
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resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
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<&mio_rst 12>;
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};
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usb1: usb@5a810100 {
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@ -249,6 +252,9 @@ usb1: usb@5a810100 {
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status = "disabled";
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reg = <0x5a810100 0x100>;
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interrupts = <0 81 4>;
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clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>;
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resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
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<&mio_rst 13>;
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};
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usb2: usb@5a820100 {
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@ -256,6 +262,9 @@ usb2: usb@5a820100 {
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status = "disabled";
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reg = <0x5a820100 0x100>;
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interrupts = <0 82 4>;
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clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>;
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resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
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<&mio_rst 14>;
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};
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usb3: usb@5a830100 {
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@ -263,6 +272,9 @@ usb3: usb@5a830100 {
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status = "disabled";
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reg = <0x5a830100 0x100>;
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interrupts = <0 83 4>;
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clocks = <&mio_clk 7>, <&mio_clk 11>, <&mio_clk 15>;
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resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 11>,
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<&mio_rst 15>;
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};
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sysctrl@f1840000 {
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