mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 16:50:54 +07:00
Second Round of Renesas ARM64 Based SoC DT Updates for v5.2
* R-Car H3 (r8a7795), M3-N (r8a77965) and E3 (r8a77990) SoCs - Describe CMT devices in DT * R-Car M3-N (r8a77965) SoC - Remove unecessary reg-names of display node * R-Car V3H (r8a77980) SoC - Add missing "renesas,id" property to VIN of device tree * RZ/G2E (r8a774c0) based CAT874 board - Add USB-HOST support -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAly52g0ACgkQ189kaWo3 T77vmw/+I4Rl6nK3aN3Drowy6rXFw3qO4Lxdudva7auV65VKcdIjeQQueyQBLslq 5/9T6K/1ewcKYy9fMWS14lyw6O2gmZD5WUeqFlmsxzXqr/0e2X3cOJ/gB7yg3I4+ PGDiFH9L4AV09eZM/emPvoh8gUKi6kL7A2MrCdv8+8qyTyV3kWvJKAtodRgh22RJ BSEuNXAJts03af/8QPCYpu2kkRHIzTqBN5AKnLAy0UafMWVNDR+I1ynOTJ6wyDV+ 0wckrti4uTU25khZbr+bnn/jth7L02ejztU/A186JydgoPAZJ5b3l7rKlMLAMhP3 6JCLm/9aKsVd+72mKBjubfNHIBz49zQM2pVADQ7prYFMA9iBuBngTfZUwRFzTWCd fx45s+9rTYZa3en3Q4l4gO0lPL6HTfdaQZgqSpC3CBG2Tri5KqNIBWo7eTp8eJIp +lBRe0djW8/Z8kwx3x8c/wCVORR5cqYKtlMj0X3S6rVvQsUQsOGz0Mm5gyJrQQfI MKT5C+R8Pup8GX3wR9lk1Pf8F8Rw8FOVmEfAleJA7z6anri7icy9ttA/49OriF6N RB2W473dElQSYeSNFkX2jrSigxw8PlXkwgjwU9mBRiODWxKZOznGErK4JCVzVybR MVERKLH9wmMypdB6drhpmSbkrKoaMjdwaPmMpfPi+LguU3v0ueI= =FMAR -----END PGP SIGNATURE----- Merge tag 'renesas-arm64-dt2-for-v5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt Second Round of Renesas ARM64 Based SoC DT Updates for v5.2 * R-Car H3 (r8a7795), M3-N (r8a77965) and E3 (r8a77990) SoCs - Describe CMT devices in DT * R-Car M3-N (r8a77965) SoC - Remove unecessary reg-names of display node * R-Car V3H (r8a77980) SoC - Add missing "renesas,id" property to VIN of device tree * RZ/G2E (r8a774c0) based CAT874 board - Add USB-HOST support * tag 'renesas-arm64-dt2-for-v5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: arm64: dts: renesas: r8a77980: Add "renesas,id" to VIN arm64: dts: renesas: r8a77965: Remove reg-names of display node arm64: dts: renesas: r8a77990: Add CMT device nodes arm64: dts: renesas: r8a77965: Add CMT device nodes arm64: dts: renesas: r8a7795: Add CMT device nodes arm64: dts: renesas: cat874: Add USB-HOST support Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
64f32d9d30
@ -76,6 +76,11 @@ vccq_sdhi0: regulator-vccq-sdhi0 {
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};
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};
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&ehci0 {
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dr_mode = "host";
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status = "okay";
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};
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&extal_clk {
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clock-frequency = <48000000>;
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};
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@ -93,6 +98,11 @@ rtc@32 {
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};
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};
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&ohci0 {
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dr_mode = "host";
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status = "okay";
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};
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&pcie_bus_clk {
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clock-frequency = <100000000>;
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};
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@ -151,3 +161,8 @@ &sdhi0 {
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sd-uhs-sdr104;
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status = "okay";
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};
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&usb2_phy0 {
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renesas,no-otg-pins;
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status = "okay";
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};
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@ -462,6 +462,76 @@ pfc: pin-controller@e6060000 {
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reg = <0 0xe6060000 0 0x50c>;
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};
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cmt0: timer@e60f0000 {
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compatible = "renesas,r8a7795-cmt0",
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"renesas,rcar-gen3-cmt0";
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reg = <0 0xe60f0000 0 0x1004>;
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interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 303>;
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clock-names = "fck";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 303>;
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status = "disabled";
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};
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cmt1: timer@e6130000 {
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compatible = "renesas,r8a7795-cmt1",
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"renesas,rcar-gen3-cmt1";
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reg = <0 0xe6130000 0 0x1004>;
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interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 302>;
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clock-names = "fck";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 302>;
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status = "disabled";
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};
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cmt2: timer@e6140000 {
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compatible = "renesas,r8a7795-cmt1",
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"renesas,rcar-gen3-cmt1";
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reg = <0 0xe6140000 0 0x1004>;
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interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 301>;
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clock-names = "fck";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 301>;
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status = "disabled";
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};
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cmt3: timer@e6148000 {
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compatible = "renesas,r8a7795-cmt1",
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"renesas,rcar-gen3-cmt1";
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reg = <0 0xe6148000 0 0x1004>;
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interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 300>;
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clock-names = "fck";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 300>;
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status = "disabled";
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};
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cpg: clock-controller@e6150000 {
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compatible = "renesas,r8a7795-cpg-mssr";
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reg = <0 0xe6150000 0 0x1000>;
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@ -317,6 +317,76 @@ pfc: pin-controller@e6060000 {
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reg = <0 0xe6060000 0 0x50c>;
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};
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cmt0: timer@e60f0000 {
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compatible = "renesas,r8a77965-cmt0",
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"renesas,rcar-gen3-cmt0";
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reg = <0 0xe60f0000 0 0x1004>;
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interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 303>;
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clock-names = "fck";
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power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
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resets = <&cpg 303>;
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status = "disabled";
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};
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cmt1: timer@e6130000 {
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compatible = "renesas,r8a77965-cmt1",
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"renesas,rcar-gen3-cmt1";
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reg = <0 0xe6130000 0 0x1004>;
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interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 302>;
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clock-names = "fck";
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power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
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resets = <&cpg 302>;
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status = "disabled";
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};
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cmt2: timer@e6140000 {
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compatible = "renesas,r8a77965-cmt1",
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"renesas,rcar-gen3-cmt1";
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reg = <0 0xe6140000 0 0x1004>;
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interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 301>;
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clock-names = "fck";
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power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
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resets = <&cpg 301>;
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status = "disabled";
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};
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cmt3: timer@e6148000 {
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compatible = "renesas,r8a77965-cmt1",
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"renesas,rcar-gen3-cmt1";
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reg = <0 0xe6148000 0 0x1004>;
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interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 300>;
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clock-names = "fck";
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power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
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resets = <&cpg 300>;
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status = "disabled";
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};
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cpg: clock-controller@e6150000 {
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compatible = "renesas,r8a77965-cpg-mssr";
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reg = <0 0xe6150000 0 0x1000>;
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@ -2377,7 +2447,6 @@ port@1 {
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du: display@feb00000 {
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compatible = "renesas,du-r8a77965";
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reg = <0 0xfeb00000 0 0x80000>;
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reg-names = "du";
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interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
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@ -865,6 +865,7 @@ vin0: video@e6ef0000 {
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clocks = <&cpg CPG_MOD 811>;
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power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
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resets = <&cpg 811>;
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renesas,id = <0>;
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status = "disabled";
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ports {
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@ -892,6 +893,7 @@ vin1: video@e6ef1000 {
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clocks = <&cpg CPG_MOD 810>;
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power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
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status = "disabled";
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renesas,id = <1>;
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resets = <&cpg 810>;
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ports {
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@ -919,6 +921,7 @@ vin2: video@e6ef2000 {
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clocks = <&cpg CPG_MOD 809>;
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power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
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resets = <&cpg 809>;
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renesas,id = <2>;
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status = "disabled";
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ports {
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@ -946,6 +949,7 @@ vin3: video@e6ef3000 {
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clocks = <&cpg CPG_MOD 808>;
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power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
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resets = <&cpg 808>;
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renesas,id = <3>;
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status = "disabled";
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ports {
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@ -973,6 +977,7 @@ vin4: video@e6ef4000 {
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clocks = <&cpg CPG_MOD 807>;
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power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
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resets = <&cpg 807>;
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renesas,id = <4>;
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status = "disabled";
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ports {
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@ -1000,6 +1005,7 @@ vin5: video@e6ef5000 {
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clocks = <&cpg CPG_MOD 806>;
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power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
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resets = <&cpg 806>;
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renesas,id = <5>;
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status = "disabled";
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ports {
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@ -1027,6 +1033,7 @@ vin6: video@e6ef6000 {
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clocks = <&cpg CPG_MOD 805>;
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power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
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resets = <&cpg 805>;
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renesas,id = <6>;
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status = "disabled";
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ports {
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@ -1054,6 +1061,7 @@ vin7: video@e6ef7000 {
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clocks = <&cpg CPG_MOD 804>;
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power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
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resets = <&cpg 804>;
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renesas,id = <7>;
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status = "disabled";
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ports {
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@ -1081,6 +1089,7 @@ vin8: video@e6ef8000 {
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clocks = <&cpg CPG_MOD 628>;
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power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
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resets = <&cpg 628>;
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renesas,id = <8>;
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status = "disabled";
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};
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@ -1091,6 +1100,7 @@ vin9: video@e6ef9000 {
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clocks = <&cpg CPG_MOD 627>;
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power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
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resets = <&cpg 627>;
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renesas,id = <9>;
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status = "disabled";
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};
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@ -1101,6 +1111,7 @@ vin10: video@e6efa000 {
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clocks = <&cpg CPG_MOD 625>;
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power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
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resets = <&cpg 625>;
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renesas,id = <10>;
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status = "disabled";
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};
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@ -1111,6 +1122,7 @@ vin11: video@e6efb000 {
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clocks = <&cpg CPG_MOD 618>;
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power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
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resets = <&cpg 618>;
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renesas,id = <11>;
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status = "disabled";
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||||
};
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@ -1121,6 +1133,7 @@ vin12: video@e6efc000 {
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clocks = <&cpg CPG_MOD 612>;
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power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
|
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resets = <&cpg 612>;
|
||||
renesas,id = <12>;
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status = "disabled";
|
||||
};
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@ -1131,6 +1144,7 @@ vin13: video@e6efd000 {
|
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clocks = <&cpg CPG_MOD 608>;
|
||||
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 608>;
|
||||
renesas,id = <13>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1141,6 +1155,7 @@ vin14: video@e6efe000 {
|
||||
clocks = <&cpg CPG_MOD 605>;
|
||||
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 605>;
|
||||
renesas,id = <14>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1151,6 +1166,7 @@ vin15: video@e6eff000 {
|
||||
clocks = <&cpg CPG_MOD 604>;
|
||||
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 604>;
|
||||
renesas,id = <15>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
||||
@ -284,6 +284,76 @@ i2c_dvfs: i2c@e60b0000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cmt0: timer@e60f0000 {
|
||||
compatible = "renesas,r8a77990-cmt0",
|
||||
"renesas,rcar-gen3-cmt0";
|
||||
reg = <0 0xe60f0000 0 0x1004>;
|
||||
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 303>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 303>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cmt1: timer@e6130000 {
|
||||
compatible = "renesas,r8a77990-cmt1",
|
||||
"renesas,rcar-gen3-cmt1";
|
||||
reg = <0 0xe6130000 0 0x1004>;
|
||||
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 302>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 302>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cmt2: timer@e6140000 {
|
||||
compatible = "renesas,r8a77990-cmt1",
|
||||
"renesas,rcar-gen3-cmt1";
|
||||
reg = <0 0xe6140000 0 0x1004>;
|
||||
interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 301>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 301>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cmt3: timer@e6148000 {
|
||||
compatible = "renesas,r8a77990-cmt1",
|
||||
"renesas,rcar-gen3-cmt1";
|
||||
reg = <0 0xe6148000 0 0x1004>;
|
||||
interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 300>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 300>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpg: clock-controller@e6150000 {
|
||||
compatible = "renesas,r8a77990-cpg-mssr";
|
||||
reg = <0 0xe6150000 0 0x1000>;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user