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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ARM: dts: imx: add IMX50 SoC device tree
Create device tree source for the Freescale IMX50 SoC. This was based on the IMX53 source with changes made as necessary. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Greg Ungerer
Shawn Guo
parent
5c7135cd28
commit
64972acd61
452
arch/arm/boot/dts/imx50.dtsi
Normal file
452
arch/arm/boot/dts/imx50.dtsi
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@ -0,0 +1,452 @@
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/*
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* Copyright 2013 Greg Ungerer <gerg@uclinux.org>
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include "skeleton.dtsi"
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#include "imx50-pinfunc.h"
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/ {
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aliases {
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gpio0 = &gpio1;
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gpio1 = &gpio2;
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gpio2 = &gpio3;
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gpio3 = &gpio4;
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gpio4 = &gpio5;
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gpio5 = &gpio6;
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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serial3 = &uart4;
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serial4 = &uart5;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a8";
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reg = <0x0>;
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};
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};
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tzic: tz-interrupt-controller@0fffc000 {
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compatible = "fsl,imx50-tzic", "fsl,imx53-tzic", "fsl,tzic";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x0fffc000 0x4000>;
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};
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clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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ckil {
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compatible = "fsl,imx-ckil", "fixed-clock";
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clock-frequency = <32768>;
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};
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ckih1 {
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compatible = "fsl,imx-ckih1", "fixed-clock";
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clock-frequency = <22579200>;
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};
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ckih2 {
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compatible = "fsl,imx-ckih2", "fixed-clock";
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clock-frequency = <0>;
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};
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osc {
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compatible = "fsl,imx-osc", "fixed-clock";
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clock-frequency = <24000000>;
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};
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&tzic>;
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ranges;
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aips@50000000 { /* AIPS1 */
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x50000000 0x10000000>;
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ranges;
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spba@50000000 {
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compatible = "fsl,spba-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x50000000 0x40000>;
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ranges;
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esdhc1: esdhc@50004000 {
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compatible = "fsl,imx50-esdhc";
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reg = <0x50004000 0x4000>;
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interrupts = <1>;
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clocks = <&clks 44>, <&clks 0>, <&clks 71>;
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clock-names = "ipg", "ahb", "per";
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bus-width = <4>;
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status = "disabled";
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};
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esdhc2: esdhc@50008000 {
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compatible = "fsl,imx50-esdhc";
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reg = <0x50008000 0x4000>;
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interrupts = <2>;
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clocks = <&clks 45>, <&clks 0>, <&clks 72>;
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clock-names = "ipg", "ahb", "per";
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bus-width = <4>;
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status = "disabled";
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};
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uart3: serial@5000c000 {
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compatible = "fsl,imx50-uart", "fsl,imx21-uart";
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reg = <0x5000c000 0x4000>;
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interrupts = <33>;
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clocks = <&clks 32>, <&clks 33>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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ecspi1: ecspi@50010000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx50-ecspi", "fsl,imx51-ecspi";
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reg = <0x50010000 0x4000>;
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interrupts = <36>;
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clocks = <&clks 51>, <&clks 52>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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ssi2: ssi@50014000 {
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compatible = "fsl,imx50-ssi", "fsl,imx21-ssi";
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reg = <0x50014000 0x4000>;
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interrupts = <30>;
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clocks = <&clks 49>;
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fsl,fifo-depth = <15>;
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fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */
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status = "disabled";
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};
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esdhc3: esdhc@50020000 {
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compatible = "fsl,imx50-esdhc";
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reg = <0x50020000 0x4000>;
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interrupts = <3>;
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clocks = <&clks 46>, <&clks 0>, <&clks 73>;
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clock-names = "ipg", "ahb", "per";
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bus-width = <4>;
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status = "disabled";
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};
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esdhc4: esdhc@50024000 {
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compatible = "fsl,imx50-esdhc";
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reg = <0x50024000 0x4000>;
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interrupts = <4>;
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clocks = <&clks 47>, <&clks 0>, <&clks 74>;
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clock-names = "ipg", "ahb", "per";
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bus-width = <4>;
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status = "disabled";
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};
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};
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usbotg: usb@53f80000 {
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compatible = "fsl,imx50-usb", "fsl,imx27-usb";
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reg = <0x53f80000 0x0200>;
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interrupts = <18>;
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clocks = <&clks 124>;
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status = "disabled";
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};
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usbh1: usb@53f80200 {
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compatible = "fsl,imx50-usb", "fsl,imx27-usb";
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reg = <0x53f80200 0x0200>;
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interrupts = <14>;
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clocks = <&clks 125>;
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status = "disabled";
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};
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usbh2: usb@53f80400 {
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compatible = "fsl,imx50-usb", "fsl,imx27-usb";
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reg = <0x53f80400 0x0200>;
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interrupts = <16>;
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clocks = <&clks 108>;
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status = "disabled";
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};
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usbh3: usb@53f80600 {
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compatible = "fsl,imx50-usb", "fsl,imx27-usb";
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reg = <0x53f80600 0x0200>;
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interrupts = <17>;
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clocks = <&clks 108>;
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status = "disabled";
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};
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gpio1: gpio@53f84000 {
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compatible = "fsl,imx50-gpio", "fsl,imx35-gpio";
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reg = <0x53f84000 0x4000>;
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interrupts = <50 51>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio2: gpio@53f88000 {
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compatible = "fsl,imx50-gpio", "fsl,imx35-gpio";
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reg = <0x53f88000 0x4000>;
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interrupts = <52 53>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio3: gpio@53f8c000 {
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compatible = "fsl,imx50-gpio", "fsl,imx35-gpio";
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reg = <0x53f8c000 0x4000>;
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interrupts = <54 55>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio4: gpio@53f90000 {
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compatible = "fsl,imx50-gpio", "fsl,imx35-gpio";
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reg = <0x53f90000 0x4000>;
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interrupts = <56 57>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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wdog1: wdog@53f98000 {
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compatible = "fsl,imx50-wdt", "fsl,imx21-wdt";
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reg = <0x53f98000 0x4000>;
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interrupts = <58>;
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clocks = <&clks 0>;
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};
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gpt: timer@53fa0000 {
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compatible = "fsl,imx50-gpt", "fsl,imx31-gpt";
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reg = <0x53fa0000 0x4000>;
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interrupts = <39>;
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clocks = <&clks 36>, <&clks 41>;
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clock-names = "ipg", "per";
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};
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iomuxc: iomuxc@53fa8000 {
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compatible = "fsl,imx50-iomuxc", "fsl,imx53-iomuxc";
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reg = <0x53fa8000 0x4000>;
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};
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gpr: iomuxc-gpr@53fa8000 {
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compatible = "fsl,imx50-iomuxc-gpr", "syscon";
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reg = <0x53fa8000 0xc>;
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};
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pwm1: pwm@53fb4000 {
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#pwm-cells = <2>;
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compatible = "fsl,imx50-pwm", "fsl,imx27-pwm";
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reg = <0x53fb4000 0x4000>;
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clocks = <&clks 37>, <&clks 38>;
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clock-names = "ipg", "per";
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interrupts = <61>;
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};
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pwm2: pwm@53fb8000 {
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#pwm-cells = <2>;
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compatible = "fsl,imx50-pwm", "fsl,imx27-pwm";
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reg = <0x53fb8000 0x4000>;
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clocks = <&clks 39>, <&clks 40>;
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clock-names = "ipg", "per";
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interrupts = <94>;
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};
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uart1: serial@53fbc000 {
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compatible = "fsl,imx50-uart", "fsl,imx21-uart";
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reg = <0x53fbc000 0x4000>;
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interrupts = <31>;
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clocks = <&clks 28>, <&clks 29>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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uart2: serial@53fc0000 {
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compatible = "fsl,imx50-uart", "fsl,imx21-uart";
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reg = <0x53fc0000 0x4000>;
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interrupts = <32>;
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clocks = <&clks 30>, <&clks 31>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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src: src@53fd0000 {
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compatible = "fsl,imx50-src", "fsl,imx51-src";
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reg = <0x53fd0000 0x4000>;
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#reset-cells = <1>;
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};
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clks: ccm@53fd4000{
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compatible = "fsl,imx50-ccm";
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reg = <0x53fd4000 0x4000>;
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interrupts = <0 71 0x04 0 72 0x04>;
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#clock-cells = <1>;
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};
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gpio5: gpio@53fdc000 {
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compatible = "fsl,imx50-gpio", "fsl,imx35-gpio";
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reg = <0x53fdc000 0x4000>;
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interrupts = <103 104>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio6: gpio@53fe0000 {
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compatible = "fsl,imx50-gpio", "fsl,imx35-gpio";
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reg = <0x53fe0000 0x4000>;
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interrupts = <105 106>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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i2c3: i2c@53fec000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx50-i2c", "fsl,imx21-i2c";
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reg = <0x53fec000 0x4000>;
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interrupts = <64>;
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clocks = <&clks 88>;
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status = "disabled";
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};
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uart4: serial@53ff0000 {
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compatible = "fsl,imx50-uart", "fsl,imx21-uart";
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reg = <0x53ff0000 0x4000>;
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interrupts = <13>;
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clocks = <&clks 65>, <&clks 66>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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};
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aips@60000000 { /* AIPS2 */
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x60000000 0x10000000>;
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ranges;
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uart5: serial@63f90000 {
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compatible = "fsl,imx50-uart", "fsl,imx21-uart";
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reg = <0x63f90000 0x4000>;
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interrupts = <86>;
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clocks = <&clks 67>, <&clks 68>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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owire: owire@63fa4000 {
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compatible = "fsl,imx50-owire", "fsl,imx21-owire";
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reg = <0x63fa4000 0x4000>;
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clocks = <&clks 159>;
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status = "disabled";
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};
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ecspi2: ecspi@63fac000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx50-ecspi", "fsl,imx51-ecspi";
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reg = <0x63fac000 0x4000>;
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interrupts = <37>;
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clocks = <&clks 53>, <&clks 54>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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sdma: sdma@63fb0000 {
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compatible = "fsl,imx50-sdma", "fsl,imx35-sdma";
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reg = <0x63fb0000 0x4000>;
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interrupts = <6>;
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clocks = <&clks 56>, <&clks 56>;
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clock-names = "ipg", "ahb";
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fsl,sdma-ram-script-name = "imx/sdma/sdma-imx50.bin";
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};
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cspi: cspi@63fc0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx50-cspi", "fsl,imx35-cspi";
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reg = <0x63fc0000 0x4000>;
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interrupts = <38>;
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clocks = <&clks 55>, <&clks 55>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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i2c2: i2c@63fc4000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx50-i2c", "fsl,imx21-i2c";
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reg = <0x63fc4000 0x4000>;
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interrupts = <63>;
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clocks = <&clks 35>;
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status = "disabled";
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};
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i2c1: i2c@63fc8000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx50-i2c", "fsl,imx21-i2c";
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reg = <0x63fc8000 0x4000>;
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interrupts = <62>;
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clocks = <&clks 34>;
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status = "disabled";
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};
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ssi1: ssi@63fcc000 {
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compatible = "fsl,imx50-ssi", "fsl,imx21-ssi";
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reg = <0x63fcc000 0x4000>;
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interrupts = <29>;
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clocks = <&clks 48>;
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fsl,fifo-depth = <15>;
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fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */
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status = "disabled";
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};
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audmux: audmux@63fd0000 {
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compatible = "fsl,imx50-audmux", "fsl,imx31-audmux";
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reg = <0x63fd0000 0x4000>;
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status = "disabled";
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};
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fec: ethernet@63fec000 {
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compatible = "fsl,imx53-fec", "fsl,imx25-fec";
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reg = <0x63fec000 0x4000>;
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interrupts = <87>;
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clocks = <&clks 42>, <&clks 42>, <&clks 42>;
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clock-names = "ipg", "ahb", "ptp";
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status = "disabled";
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};
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};
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};
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};
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