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ath9k_hw: reduce delay on programming INI on AR9003

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All AR9003 devices are PCI-E only, the extra delay here
is not required and only reduces the delay for loading
the initial register values by at least 14ms.

Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Luis R. Rodriguez 2010-06-12 00:33:47 -04:00 committed by John W. Linville
parent 03c725183b
commit 644c78c95a
1 changed files with 0 additions and 9 deletions
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9
drivers/net/wireless/ath/ath9k/ar9003_phy.c
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@ -543,15 +543,6 @@ static void ar9003_hw_prog_ini(struct ath_hw *ah,
u32 val = INI_RA(iniArr, i, column);
REG_WRITE(ah, reg, val);
/*
* Determine if this is a shift register value, and insert the
* configured delay if so.
*/
if (reg >= 0x16000 && reg < 0x17000
&& ah->config.analog_shiftreg)
udelay(100);
DO_DELAY(regWrites);
}
}