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drm/amd/powerplay: add enum smu_msg_type to header

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each asic with different message index,
add this header to help top level smu code to send message.

Signed-off-by: Kevin Wang <Kevin1.Wang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Kevin Wang 2018-12-19 15:12:10 +08:00 committed by Alex Deucher
parent e88e4f836c
commit 64136ea6e7
1 changed files with 89 additions and 0 deletions
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89
drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
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@ -24,6 +24,95 @@
#include "amdgpu.h"
enum smu_message_type
{
SMU_MSG_TestMessage = 0,
SMU_MSG_GetSmuVersion,
SMU_MSG_GetDriverIfVersion,
SMU_MSG_SetAllowedFeaturesMaskLow,
SMU_MSG_SetAllowedFeaturesMaskHigh,
SMU_MSG_EnableAllSmuFeatures,
SMU_MSG_DisableAllSmuFeatures,
SMU_MSG_EnableSmuFeaturesLow,
SMU_MSG_EnableSmuFeaturesHigh,
SMU_MSG_DisableSmuFeaturesLow,
SMU_MSG_DisableSmuFeaturesHigh,
SMU_MSG_GetEnabledSmuFeaturesLow,
SMU_MSG_GetEnabledSmuFeaturesHigh,
SMU_MSG_SetWorkloadMask,
SMU_MSG_SetPptLimit,
SMU_MSG_SetDriverDramAddrHigh,
SMU_MSG_SetDriverDramAddrLow,
SMU_MSG_SetToolsDramAddrHigh,
SMU_MSG_SetToolsDramAddrLow,
SMU_MSG_TransferTableSmu2Dram,
SMU_MSG_TransferTableDram2Smu,
SMU_MSG_UseDefaultPPTable,
SMU_MSG_UseBackupPPTable,
SMU_MSG_RunBtc,
SMU_MSG_RequestI2CBus,
SMU_MSG_ReleaseI2CBus,
SMU_MSG_SetFloorSocVoltage,
SMU_MSG_SoftReset,
SMU_MSG_StartBacoMonitor,
SMU_MSG_CancelBacoMonitor,
SMU_MSG_EnterBaco,
SMU_MSG_SetSoftMinByFreq,
SMU_MSG_SetSoftMaxByFreq,
SMU_MSG_SetHardMinByFreq,
SMU_MSG_SetHardMaxByFreq,
SMU_MSG_GetMinDpmFreq,
SMU_MSG_GetMaxDpmFreq,
SMU_MSG_GetDpmFreqByIndex,
SMU_MSG_GetDpmClockFreq,
SMU_MSG_GetSsVoltageByDpm,
SMU_MSG_SetMemoryChannelConfig,
SMU_MSG_SetGeminiMode,
SMU_MSG_SetGeminiApertureHigh,
SMU_MSG_SetGeminiApertureLow,
SMU_MSG_SetMinLinkDpmByIndex,
SMU_MSG_OverridePcieParameters,
SMU_MSG_OverDriveSetPercentage,
SMU_MSG_SetMinDeepSleepDcefclk,
SMU_MSG_ReenableAcDcInterrupt,
SMU_MSG_NotifyPowerSource,
SMU_MSG_SetUclkFastSwitch,
SMU_MSG_SetUclkDownHyst,
SMU_MSG_GfxDeviceDriverReset,
SMU_MSG_GetCurrentRpm,
SMU_MSG_SetVideoFps,
SMU_MSG_SetTjMax,
SMU_MSG_SetFanTemperatureTarget,
SMU_MSG_PrepareMp1ForUnload,
SMU_MSG_DramLogSetDramAddrHigh,
SMU_MSG_DramLogSetDramAddrLow,
SMU_MSG_DramLogSetDramSize,
SMU_MSG_SetFanMaxRpm,
SMU_MSG_SetFanMinPwm,
SMU_MSG_ConfigureGfxDidt,
SMU_MSG_NumOfDisplays,
SMU_MSG_RemoveMargins,
SMU_MSG_ReadSerialNumTop32,
SMU_MSG_ReadSerialNumBottom32,
SMU_MSG_SetSystemVirtualDramAddrHigh,
SMU_MSG_SetSystemVirtualDramAddrLow,
SMU_MSG_WaflTest,
SMU_MSG_SetFclkGfxClkRatio,
SMU_MSG_AllowGfxOff,
SMU_MSG_DisallowGfxOff,
SMU_MSG_GetPptLimit,
SMU_MSG_GetDcModeMaxDpmFreq,
SMU_MSG_GetDebugData,
SMU_MSG_SetXgmiMode,
SMU_MSG_RunAfllBtc,
SMU_MSG_ExitBaco,
SMU_MSG_PrepareMp1ForReset,
SMU_MSG_PrepareMp1ForShutdown,
SMU_MSG_SetMGpuFanBoostLimitRpm,
SMU_MSG_GetAVFSVoltageByDpm,
SMU_MSG_MAX_COUNT,
};
enum smu_memory_pool_size
{
SMU_MEMORY_POOL_SIZE_ZERO = 0,