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dt-bindings: dma: Convert jz4740-dma doc to YAML
Convert the textual documentation for the Ingenic SoCs DMA Controller devicetree binding to YAML. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Rob Herring <robh@kernel.org>
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Documentation/devicetree/bindings/dma/ingenic,dma.yaml
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Documentation/devicetree/bindings/dma/ingenic,dma.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dma/ingenic,dma.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Ingenic SoCs DMA Controller DT bindings
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maintainers:
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- Paul Cercueil <paul@crapouillou.net>
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allOf:
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- $ref: "dma-controller.yaml#"
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properties:
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compatible:
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enum:
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- ingenic,jz4740-dma
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- ingenic,jz4725b-dma
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- ingenic,jz4770-dma
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- ingenic,jz4780-dma
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- ingenic,x1000-dma
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- ingenic,x1830-dma
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reg:
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items:
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- description: Channel-specific registers
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- description: System control registers
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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"#dma-cells":
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const: 2
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description: >
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DMA clients must use the format described in dma.txt, giving a phandle
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to the DMA controller plus the following 2 integer cells:
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- Request type: The DMA request type for transfers to/from the
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device on the allocated channel, as defined in the SoC documentation.
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- Channel: If set to 0xffffffff, any available channel will be allocated
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for the client. Otherwise, the exact channel specified will be used.
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The channel should be reserved on the DMA controller using the
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ingenic,reserved-channels property.
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ingenic,reserved-channels:
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$ref: /schemas/types.yaml#definitions/uint32
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description: >
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Bitmask of channels to reserve for devices that need a specific
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channel. These channels will only be assigned when explicitely
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requested by a client. The primary use for this is channels 0 and
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1, which can be configured to have special behaviour for NAND/BCH
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when using programmable firmware.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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examples:
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- |
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#include <dt-bindings/clock/jz4780-cgu.h>
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dma: dma-controller@13420000 {
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compatible = "ingenic,jz4780-dma";
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reg = <0x13420000 0x400>, <0x13421000 0x40>;
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interrupt-parent = <&intc>;
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interrupts = <10>;
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clocks = <&cgu JZ4780_CLK_PDMA>;
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#dma-cells = <2>;
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ingenic,reserved-channels = <0x3>;
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};
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@ -1,64 +0,0 @@
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* Ingenic XBurst DMA Controller
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Required properties:
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- compatible: Should be one of:
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* ingenic,jz4740-dma
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* ingenic,jz4725b-dma
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* ingenic,jz4770-dma
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* ingenic,jz4780-dma
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* ingenic,x1000-dma
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* ingenic,x1830-dma
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- reg: Should contain the DMA channel registers location and length, followed
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by the DMA controller registers location and length.
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- interrupts: Should contain the interrupt specifier of the DMA controller.
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- clocks: Should contain a clock specifier for the JZ4780/X1000/X1830 PDMA
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clock.
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- #dma-cells: Must be <2>. Number of integer cells in the dmas property of
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DMA clients (see below).
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Optional properties:
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- ingenic,reserved-channels: Bitmask of channels to reserve for devices that
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need a specific channel. These channels will only be assigned when explicitly
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requested by a client. The primary use for this is channels 0 and 1, which
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can be configured to have special behaviour for NAND/BCH when using
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programmable firmware.
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Example:
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dma: dma-controller@13420000 {
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compatible = "ingenic,jz4780-dma";
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reg = <0x13420000 0x400
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0x13421000 0x40>;
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interrupt-parent = <&intc>;
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interrupts = <10>;
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clocks = <&cgu JZ4780_CLK_PDMA>;
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#dma-cells = <2>;
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ingenic,reserved-channels = <0x3>;
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};
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DMA clients must use the format described in dma.txt, giving a phandle to the
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DMA controller plus the following 2 integer cells:
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1. Request type: The DMA request type for transfers to/from the device on
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the allocated channel, as defined in the SoC documentation.
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2. Channel: If set to 0xffffffff, any available channel will be allocated for
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the client. Otherwise, the exact channel specified will be used. The channel
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should be reserved on the DMA controller using the ingenic,reserved-channels
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property.
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Example:
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uart0: serial@10030000 {
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...
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dmas = <&dma 0x14 0xffffffff
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&dma 0x15 0xffffffff>;
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dma-names = "tx", "rx";
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...
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};
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