mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-14 17:36:44 +07:00
Qualcomm ARM64 Updates for v4.14
* Force USB host mode on APQ8016 * Update coresight nodes on MSM8916 * Add MSM8996 support for USB, PCIE phy, RPM/GLink, and modem SMP2P * Add db820c PM8994 regulator node * Add PMI8994 gpios * Add assorted MSM8916 nodes including GPU, IOMMU, Venus, and CEC clock. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZlGB6AAoJEFKiBbHx2RXVyw0P/R8Qi/qZFjMa/SU+toBdCH3J 5b11eVK6gnGmFWi3Duabxufhj5zZ6A4i05VWkgR9eU2bJ2XCAwG+WnmMzQ+vUAp5 QTj2g//1zrvNr4lBjPvHwD17K/tsjs/7MRBGlaUxUokDP8JpBCvnDtdBpyXSjEdz bcctn9sab63R13/wGdfCnc6/UiAo99vTRVlsd2OktbWd7c29KZfHuBO+lJ3bXUPM wUnk1Ax25t6uAfLDRPArGO8BH4UoH/a47ZLSjzBON9UAt67KN1qlTiI3MqT1boWH W4el/AJYGmyKKACg4Rstfpy41Y1MCMJPUlmGW6yuF5KrFteABuZqH60j/75AFbP7 pME95qQ7vwJAXg4U8CSi00KjQm/ns0voX9wS4luJKol9mak33HSyNRfcGINrZg5h 23sdiGbmeq6nDjxgh9lARhOwnWwPCAEjSmYr2OW8m9zWxIPox9ZjuDjLCVVkMnJ4 cTSnEeG5yIVFiBGg9nWDMEASuTdjfRHe7aHr/JLVNa/Y/Q6nVz1oni0xDyB4fUsR /nvUn3mva735D83MpVTuiOqMl2CZTZ3PJwva0ptpsc53EMedaVpt7RApxKjcC+F4 7Yuf3tS0b3i5mTiFJKi7hlUbhOk9r4neo4GomoLPwOZLkYL2RarYpZ9/WQEmLYzP POGSocCfI24EqxcfFx+b =8+nf -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64 Pull "Qualcomm ARM64 Updates for v4.14" from Andy Gross: * Force USB host mode on APQ8016 * Update coresight nodes on MSM8916 * Add MSM8996 support for USB, PCIE phy, RPM/GLink, and modem SMP2P * Add db820c PM8994 regulator node * Add PMI8994 gpios * Add assorted MSM8916 nodes including GPU, IOMMU, Venus, and CEC clock. * tag 'qcom-arm64-for-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: arm64: dts: qcom: msm8916: Add IOMMU support arm64: dts: qcom: msm8916: Add Venus video codec support arm64: dts: qcom: msm8916: Add gpu support arm64: dts: qcom: msm8996: Specify smd-edge for ADSP arm64: dts: msm8996: Add modem smp2p nodes arm64: dts: qcom: db820c: Add pm8994 regulator node arm64: dts: qcom: Add RPM glink nodes to msm8996 arm64: dts: msm8996: Add device node for qcom,dwc3 arm64: dts: msm8996: Add device node for qcom qmp-phy for pcie arm64: dts: msm8996: Add device node for qcom qmp-phy for usb arm64: dts: msm8996: Add device node for qcom qusb2 phy arm64: dts: qcom: add cec clock for apq8016 board arm64: dts: pmi8994: Add device node for pmi8994 gpios arm64: dts: qcom-msm8916: dts: Update coresight replicator arm64: dts: qcom: Force host mode for USB on apq8016-sbc
This commit is contained in:
Arnd Bergmann
commit
63b5e000a8
@ -17,6 +17,7 @@ pinconf {
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function = PMIC_GPIO_FUNC_NORMAL;
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power-source = <PM8916_GPIO_VPH>;
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input-disable;
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output-high;
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};
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};
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@ -88,6 +88,8 @@ adv_bridge: bridge@39 {
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interrupts = <31 2>;
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adi,dsi-lanes = <4>;
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clocks = <&rpmcc RPM_SMD_BB_CLK2>;
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clock-names = "cec";
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pd-gpios = <&msmgpio 32 0>;
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@ -213,11 +215,14 @@ sdhci@07864000 {
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};
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usb@78d9000 {
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extcon = <&usb_id>, <&usb_id>;
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extcon = <&usb_id>;
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status = "okay";
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adp-disable;
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hnp-disable;
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srp-disable;
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dr_mode = "host";
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pinctrl-names = "default";
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pinctrl-0 = <&usb_sw_sel_pm>;
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ulpi {
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phy {
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v1p8-supply = <&pm8916_l7>;
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@ -337,19 +342,11 @@ usb2513 {
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usb_id: usb-id {
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compatible = "linux,extcon-usb-gpio";
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id-gpio = <&msmgpio 121 GPIO_ACTIVE_HIGH>;
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vbus-gpio = <&msmgpio 121 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb_id_default>;
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};
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usb-switch {
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compatible = "toshiba,tc7usb40mu";
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switch-gpios = <&pm8916_gpios 4 GPIO_ACTIVE_HIGH>;
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extcon = <&usb_id>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb_sw_sel_pm>;
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};
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hdmi-out {
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compatible = "hdmi-connector";
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type = "a";
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@ -24,4 +24,28 @@ pinconf {
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power-source = <PM8994_GPIO_S4>; // 1.8V
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};
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};
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usb3_vbus_det_gpio: pm8996_gpio22 {
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pinconf {
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pins = "gpio22";
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function = PMIC_GPIO_FUNC_NORMAL;
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input-enable;
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bias-pull-down;
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qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
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power-source = <PM8994_GPIO_S4>; // 1.8V
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};
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};
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};
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&pmi8994_gpios {
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usb2_vbus_det_gpio: pmi8996_gpio6 {
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pinconf {
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pins = "gpio6";
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function = PMIC_GPIO_FUNC_NORMAL;
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input-enable;
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bias-pull-down;
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qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
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power-source = <PM8994_GPIO_S4>; // 1.8V
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};
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};
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};
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@ -13,6 +13,7 @@
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#include "msm8996.dtsi"
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#include "pm8994.dtsi"
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#include "pmi8994.dtsi"
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#include "apq8096-db820c-pins.dtsi"
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#include "apq8096-db820c-pmic-pins.dtsi"
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#include <dt-bindings/input/input.h>
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@ -88,6 +89,55 @@ sdhci@74a4900 {
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cd-gpios = <&msmgpio 38 0x1>;
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status = "okay";
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};
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phy@34000 {
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status = "okay";
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};
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phy@7410000 {
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status = "okay";
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};
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phy@7411000 {
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status = "okay";
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};
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phy@7412000 {
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status = "okay";
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};
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usb@6a00000 {
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status = "okay";
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dwc3@6a00000 {
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extcon = <&usb3_id>;
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dr_mode = "otg";
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};
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};
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usb3_id: usb3-id {
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compatible = "linux,extcon-usb-gpio";
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id-gpio = <&pm8994_gpios 22 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb3_vbus_det_gpio>;
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};
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usb@7600000 {
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status = "okay";
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dwc3@7600000 {
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extcon = <&usb2_id>;
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dr_mode = "otg";
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maximum-speed = "high-speed";
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};
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};
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usb2_id: usb2-id {
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compatible = "linux,extcon-usb-gpio";
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id-gpio = <&pmi8994_gpios 6 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb2_vbus_det_gpio>;
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};
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};
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@ -106,4 +156,152 @@ button@0 {
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gpios = <&pm8994_gpios 2 GPIO_ACTIVE_LOW>;
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};
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};
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rpm-glink {
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rpm_requests {
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pm8994-regulators {
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vdd_l1-supply = <&pm8994_s3>;
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vdd_l2_l26_l28-supply = <&pm8994_s3>;
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vdd_l3_l11-supply = <&pm8994_s3>;
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vdd_l4_l27_l31-supply = <&pm8994_s3>;
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vdd_l5_l7-supply = <&pm8994_s5>;
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vdd_l14_l15-supply = <&pm8994_s5>;
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vdd_l20_l21-supply = <&pm8994_s5>;
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vdd_l25-supply = <&pm8994_s3>;
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s3 {
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regulator-min-microvolt = <1300000>;
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regulator-max-microvolt = <1300000>;
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};
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s4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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s5 {
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regulator-min-microvolt = <2150000>;
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regulator-max-microvolt = <2150000>;
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};
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s7 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <800000>;
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};
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l1 {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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};
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l2 {
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regulator-min-microvolt = <1250000>;
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regulator-max-microvolt = <1250000>;
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};
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l3 {
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <850000>;
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};
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l4 {
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regulator-min-microvolt = <1225000>;
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regulator-max-microvolt = <1225000>;
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};
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l6 {
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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};
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l8 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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l9 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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l10 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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l11 {
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regulator-min-microvolt = <1150000>;
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regulator-max-microvolt = <1150000>;
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};
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l12 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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l13 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <2950000>;
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};
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l14 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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l15 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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l16 {
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regulator-min-microvolt = <2700000>;
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regulator-max-microvolt = <2700000>;
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};
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l17 {
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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};
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l18 {
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regulator-min-microvolt = <2700000>;
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regulator-max-microvolt = <2900000>;
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};
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l19 {
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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};
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l20 {
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regulator-min-microvolt = <2950000>;
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regulator-max-microvolt = <2950000>;
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regulator-allow-set-load;
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};
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l21 {
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regulator-min-microvolt = <2950000>;
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regulator-max-microvolt = <2950000>;
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};
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l22 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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l23 {
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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};
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l24 {
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regulator-min-microvolt = <3075000>;
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regulator-max-microvolt = <3075000>;
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};
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l25 {
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-allow-set-load;
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};
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l27 {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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};
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l28 {
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regulator-min-microvolt = <925000>;
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regulator-max-microvolt = <925000>;
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regulator-allow-set-load;
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};
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l29 {
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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};
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l30 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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l32 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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};
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};
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};
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};
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@ -88,6 +88,11 @@ wcnss_mem: wcnss@89300000 {
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no-map;
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};
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venus_mem: venus@89900000 {
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reg = <0x0 0x89900000 0x0 0x600000>;
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no-map;
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};
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mba_mem: mba@8ea00000 {
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no-map;
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reg = <0 0x8ea00000 0 0x100000>;
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@ -204,6 +209,17 @@ cpu_crit1: trip1 {
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};
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gpu_opp_table: opp_table {
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compatible = "operating-points-v2";
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opp-400000000 {
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opp-hz = /bits/ 64 <400000000>;
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};
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opp-19200000 {
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opp-hz = /bits/ 64 <19200000>;
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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@ -694,6 +710,84 @@ tsens: thermal-sensor@4a8000 {
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#thermal-sensor-cells = <1>;
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};
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apps_iommu: iommu@1ef0000 {
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#address-cells = <1>;
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#size-cells = <1>;
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#iommu-cells = <1>;
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compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
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ranges = <0 0x1e20000 0x40000>;
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reg = <0x1ef0000 0x3000>;
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clocks = <&gcc GCC_SMMU_CFG_CLK>,
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<&gcc GCC_APSS_TCU_CLK>;
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clock-names = "iface", "bus";
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qcom,iommu-secure-id = <17>;
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// mdp_0:
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iommu-ctx@4000 {
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compatible = "qcom,msm-iommu-v1-ns";
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reg = <0x4000 0x1000>;
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interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
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};
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// venus_ns:
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iommu-ctx@5000 {
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compatible = "qcom,msm-iommu-v1-sec";
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reg = <0x5000 0x1000>;
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interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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gpu_iommu: iommu@1f08000 {
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#address-cells = <1>;
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#size-cells = <1>;
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#iommu-cells = <1>;
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compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
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ranges = <0 0x1f08000 0x10000>;
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clocks = <&gcc GCC_SMMU_CFG_CLK>,
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<&gcc GCC_GFX_TCU_CLK>;
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clock-names = "iface", "bus";
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qcom,iommu-secure-id = <18>;
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// gfx3d_user:
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iommu-ctx@1000 {
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compatible = "qcom,msm-iommu-v1-ns";
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reg = <0x1000 0x1000>;
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interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
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};
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// gfx3d_priv:
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iommu-ctx@2000 {
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compatible = "qcom,msm-iommu-v1-ns";
|
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reg = <0x2000 0x1000>;
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interrupts = <GIC_SPI 242 0>;
|
||||
};
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||||
};
|
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|
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gpu@1c00000 {
|
||||
compatible = "qcom,adreno-306.0", "qcom,adreno";
|
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reg = <0x01c00000 0x20000>;
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reg-names = "kgsl_3d0_reg_memory";
|
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interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
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interrupt-names = "kgsl_3d0_irq";
|
||||
clock-names =
|
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"core",
|
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"iface",
|
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"mem",
|
||||
"mem_iface",
|
||||
"alt_mem_iface",
|
||||
"gfx3d";
|
||||
clocks =
|
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<&gcc GCC_OXILI_GFX3D_CLK>,
|
||||
<&gcc GCC_OXILI_AHB_CLK>,
|
||||
<&gcc GCC_OXILI_GMEM_CLK>,
|
||||
<&gcc GCC_BIMC_GFX_CLK>,
|
||||
<&gcc GCC_BIMC_GPU_CLK>,
|
||||
<&gcc GFX3D_CLK_SRC>;
|
||||
power-domains = <&gcc OXILI_GDSC>;
|
||||
operating-points-v2 = <&gpu_opp_table>;
|
||||
iommus = <&gpu_iommu 1>, <&gpu_iommu 2>;
|
||||
};
|
||||
|
||||
mdss: mdss@1a00000 {
|
||||
compatible = "qcom,mdss";
|
||||
reg = <0x1a00000 0x1000>,
|
||||
@ -735,6 +829,8 @@ mdp: mdp@1a01000 {
|
||||
"core_clk",
|
||||
"vsync_clk";
|
||||
|
||||
iommus = <&apps_iommu 4>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -990,7 +1086,7 @@ funnel0_out: endpoint {
|
||||
};
|
||||
|
||||
replicator@824000 {
|
||||
compatible = "qcom,coresight-replicator1x", "arm,primecell";
|
||||
compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
|
||||
reg = <0x824000 0x1000>;
|
||||
|
||||
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
|
||||
@ -1207,6 +1303,28 @@ etm3_out: endpoint {
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
venus: video-codec@1d00000 {
|
||||
compatible = "qcom,msm8916-venus";
|
||||
reg = <0x01d00000 0xff000>;
|
||||
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&gcc VENUS_GDSC>;
|
||||
clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
|
||||
<&gcc GCC_VENUS0_AHB_CLK>,
|
||||
<&gcc GCC_VENUS0_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus";
|
||||
iommus = <&apps_iommu 5>;
|
||||
memory-region = <&venus_mem>;
|
||||
status = "okay";
|
||||
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
smd {
|
||||
|
||||
@ -276,12 +276,83 @@ smem {
|
||||
hwlocks = <&tcsr_mutex 3>;
|
||||
};
|
||||
|
||||
rpm-glink {
|
||||
compatible = "qcom,glink-rpm";
|
||||
|
||||
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,rpm-msg-ram = <&rpm_msg_ram>;
|
||||
|
||||
mboxes = <&apcs_glb 0>;
|
||||
|
||||
rpm_requests {
|
||||
compatible = "qcom,rpm-msm8996";
|
||||
qcom,glink-channels = "rpm_requests";
|
||||
|
||||
pm8994-regulators {
|
||||
compatible = "qcom,rpm-pm8994-regulators";
|
||||
|
||||
pm8994_s1: s1 {};
|
||||
pm8994_s2: s2 {};
|
||||
pm8994_s3: s3 {};
|
||||
pm8994_s4: s4 {};
|
||||
pm8994_s5: s5 {};
|
||||
pm8994_s6: s6 {};
|
||||
pm8994_s7: s7 {};
|
||||
pm8994_s8: s8 {};
|
||||
pm8994_s9: s9 {};
|
||||
pm8994_s10: s10 {};
|
||||
pm8994_s11: s11 {};
|
||||
pm8994_s12: s12 {};
|
||||
|
||||
pm8994_l1: l1 {};
|
||||
pm8994_l2: l2 {};
|
||||
pm8994_l3: l3 {};
|
||||
pm8994_l4: l4 {};
|
||||
pm8994_l5: l5 {};
|
||||
pm8994_l6: l6 {};
|
||||
pm8994_l7: l7 {};
|
||||
pm8994_l8: l8 {};
|
||||
pm8994_l9: l9 {};
|
||||
pm8994_l10: l10 {};
|
||||
pm8994_l11: l11 {};
|
||||
pm8994_l12: l12 {};
|
||||
pm8994_l13: l13 {};
|
||||
pm8994_l14: l14 {};
|
||||
pm8994_l15: l15 {};
|
||||
pm8994_l16: l16 {};
|
||||
pm8994_l17: l17 {};
|
||||
pm8994_l18: l18 {};
|
||||
pm8994_l19: l19 {};
|
||||
pm8994_l20: l20 {};
|
||||
pm8994_l21: l21 {};
|
||||
pm8994_l22: l22 {};
|
||||
pm8994_l23: l23 {};
|
||||
pm8994_l24: l24 {};
|
||||
pm8994_l25: l25 {};
|
||||
pm8994_l26: l26 {};
|
||||
pm8994_l27: l27 {};
|
||||
pm8994_l28: l28 {};
|
||||
pm8994_l29: l29 {};
|
||||
pm8994_l30: l30 {};
|
||||
pm8994_l31: l31 {};
|
||||
pm8994_l32: l32 {};
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
|
||||
soc: soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0 0xffffffff>;
|
||||
compatible = "simple-bus";
|
||||
|
||||
rpm_msg_ram: memory@68000 {
|
||||
compatible = "qcom,rpm-msg-ram";
|
||||
reg = <0x68000 0x6000>;
|
||||
};
|
||||
|
||||
tcsr_mutex_regs: syscon@740000 {
|
||||
compatible = "syscon";
|
||||
reg = <0x740000 0x20000>;
|
||||
@ -303,6 +374,13 @@ apcs: syscon@9820000 {
|
||||
reg = <0x9820000 0x1000>;
|
||||
};
|
||||
|
||||
apcs_glb: mailbox@9820000 {
|
||||
compatible = "qcom,msm8996-apcs-hmss-global";
|
||||
reg = <0x9820000 0x1000>;
|
||||
|
||||
#mbox-cells = <1>;
|
||||
};
|
||||
|
||||
gcc: clock-controller@300000 {
|
||||
compatible = "qcom,gcc-msm8996";
|
||||
#clock-cells = <1>;
|
||||
@ -538,6 +616,209 @@ mmcc: clock-controller@8c0000 {
|
||||
<960000000>,
|
||||
<825000000>;
|
||||
};
|
||||
|
||||
qfprom@74000 {
|
||||
compatible = "qcom,qfprom";
|
||||
reg = <0x74000 0x8ff>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
qusb2p_hstx_trim: hstx_trim@24e {
|
||||
reg = <0x24e 0x2>;
|
||||
bits = <5 4>;
|
||||
};
|
||||
|
||||
qusb2s_hstx_trim: hstx_trim@24f {
|
||||
reg = <0x24f 0x1>;
|
||||
bits = <1 4>;
|
||||
};
|
||||
};
|
||||
|
||||
phy@34000 {
|
||||
compatible = "qcom,msm8996-qmp-pcie-phy";
|
||||
reg = <0x34000 0x488>;
|
||||
#clock-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
|
||||
<&gcc GCC_PCIE_PHY_CFG_AHB_CLK>,
|
||||
<&gcc GCC_PCIE_CLKREF_CLK>;
|
||||
clock-names = "aux", "cfg_ahb", "ref";
|
||||
|
||||
vdda-phy-supply = <&pm8994_l28>;
|
||||
vdda-pll-supply = <&pm8994_l12>;
|
||||
|
||||
resets = <&gcc GCC_PCIE_PHY_BCR>,
|
||||
<&gcc GCC_PCIE_PHY_COM_BCR>,
|
||||
<&gcc GCC_PCIE_PHY_COM_NOCSR_BCR>;
|
||||
reset-names = "phy", "common", "cfg";
|
||||
status = "disabled";
|
||||
|
||||
pciephy_0: lane@35000 {
|
||||
reg = <0x035000 0x130>,
|
||||
<0x035200 0x200>,
|
||||
<0x035400 0x1dc>;
|
||||
#phy-cells = <0>;
|
||||
|
||||
clock-output-names = "pcie_0_pipe_clk_src";
|
||||
clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
|
||||
clock-names = "pipe0";
|
||||
resets = <&gcc GCC_PCIE_0_PHY_BCR>;
|
||||
reset-names = "lane0";
|
||||
};
|
||||
|
||||
pciephy_1: lane@36000 {
|
||||
reg = <0x036000 0x130>,
|
||||
<0x036200 0x200>,
|
||||
<0x036400 0x1dc>;
|
||||
#phy-cells = <0>;
|
||||
|
||||
clock-output-names = "pcie_1_pipe_clk_src";
|
||||
clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
|
||||
clock-names = "pipe1";
|
||||
resets = <&gcc GCC_PCIE_1_PHY_BCR>;
|
||||
reset-names = "lane1";
|
||||
};
|
||||
|
||||
pciephy_2: lane@37000 {
|
||||
reg = <0x037000 0x130>,
|
||||
<0x037200 0x200>,
|
||||
<0x037400 0x1dc>;
|
||||
#phy-cells = <0>;
|
||||
|
||||
clock-output-names = "pcie_2_pipe_clk_src";
|
||||
clocks = <&gcc GCC_PCIE_2_PIPE_CLK>;
|
||||
clock-names = "pipe2";
|
||||
resets = <&gcc GCC_PCIE_2_PHY_BCR>;
|
||||
reset-names = "lane2";
|
||||
};
|
||||
};
|
||||
|
||||
phy@7410000 {
|
||||
compatible = "qcom,msm8996-qmp-usb3-phy";
|
||||
reg = <0x7410000 0x1c4>;
|
||||
#clock-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
|
||||
<&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
|
||||
<&gcc GCC_USB3_CLKREF_CLK>;
|
||||
clock-names = "aux", "cfg_ahb", "ref";
|
||||
|
||||
vdda-phy-supply = <&pm8994_l28>;
|
||||
vdda-pll-supply = <&pm8994_l12>;
|
||||
|
||||
resets = <&gcc GCC_USB3_PHY_BCR>,
|
||||
<&gcc GCC_USB3PHY_PHY_BCR>;
|
||||
reset-names = "phy", "common";
|
||||
status = "disabled";
|
||||
|
||||
ssusb_phy_0: lane@7410200 {
|
||||
reg = <0x7410200 0x200>,
|
||||
<0x7410400 0x130>,
|
||||
<0x7410600 0x1a8>;
|
||||
#phy-cells = <0>;
|
||||
|
||||
clock-output-names = "usb3_phy_pipe_clk_src";
|
||||
clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
|
||||
clock-names = "pipe0";
|
||||
};
|
||||
};
|
||||
|
||||
hsusb_phy1: phy@7411000 {
|
||||
compatible = "qcom,msm8996-qusb2-phy";
|
||||
reg = <0x7411000 0x180>;
|
||||
#phy-cells = <0>;
|
||||
|
||||
clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
|
||||
<&gcc GCC_RX1_USB2_CLKREF_CLK>;
|
||||
clock-names = "cfg_ahb", "ref";
|
||||
|
||||
vdda-pll-supply = <&pm8994_l12>;
|
||||
vdda-phy-dpdm-supply = <&pm8994_l24>;
|
||||
|
||||
resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
|
||||
nvmem-cells = <&qusb2p_hstx_trim>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsusb_phy2: phy@7412000 {
|
||||
compatible = "qcom,msm8996-qusb2-phy";
|
||||
reg = <0x7412000 0x180>;
|
||||
#phy-cells = <0>;
|
||||
|
||||
clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
|
||||
<&gcc GCC_RX2_USB2_CLKREF_CLK>;
|
||||
clock-names = "cfg_ahb", "ref";
|
||||
|
||||
vdda-pll-supply = <&pm8994_l12>;
|
||||
vdda-phy-dpdm-supply = <&pm8994_l24>;
|
||||
|
||||
resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
|
||||
nvmem-cells = <&qusb2s_hstx_trim>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb2: usb@7600000 {
|
||||
compatible = "qcom,dwc3";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
clocks = <&gcc GCC_PERIPH_NOC_USB20_AHB_CLK>,
|
||||
<&gcc GCC_USB20_MASTER_CLK>,
|
||||
<&gcc GCC_USB20_MOCK_UTMI_CLK>,
|
||||
<&gcc GCC_USB20_SLEEP_CLK>,
|
||||
<&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>;
|
||||
|
||||
assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
|
||||
<&gcc GCC_USB20_MASTER_CLK>;
|
||||
assigned-clock-rates = <19200000>, <60000000>;
|
||||
|
||||
power-domains = <&gcc USB30_GDSC>;
|
||||
status = "disabled";
|
||||
|
||||
dwc3@7600000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x7600000 0xcc00>;
|
||||
interrupts = <0 138 0>;
|
||||
phys = <&hsusb_phy2>;
|
||||
phy-names = "usb2-phy";
|
||||
};
|
||||
};
|
||||
|
||||
usb3: usb@6a00000 {
|
||||
compatible = "qcom,dwc3";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
clocks = <&gcc GCC_SYS_NOC_USB3_AXI_CLK>,
|
||||
<&gcc GCC_USB30_MASTER_CLK>,
|
||||
<&gcc GCC_AGGRE2_USB3_AXI_CLK>,
|
||||
<&gcc GCC_USB30_MOCK_UTMI_CLK>,
|
||||
<&gcc GCC_USB30_SLEEP_CLK>,
|
||||
<&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>;
|
||||
|
||||
assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
|
||||
<&gcc GCC_USB30_MASTER_CLK>;
|
||||
assigned-clock-rates = <19200000>, <120000000>;
|
||||
|
||||
power-domains = <&gcc USB30_GDSC>;
|
||||
status = "disabled";
|
||||
|
||||
dwc3@6a00000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x6a00000 0xcc00>;
|
||||
interrupts = <0 131 0>;
|
||||
phys = <&hsusb_phy1>, <&ssusb_phy_0>;
|
||||
phy-names = "usb2-phy", "usb3-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
adsp-pil {
|
||||
@ -558,6 +839,15 @@ adsp-pil {
|
||||
|
||||
qcom,smem-states = <&adsp_smp2p_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
smd-edge {
|
||||
interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
label = "lpass";
|
||||
qcom,ipc = <&apcs 16 8>;
|
||||
qcom,smd-edge = <1>;
|
||||
qcom,remote-pid = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
adsp-smp2p {
|
||||
@ -584,6 +874,30 @@ adsp_smp2p_in: slave-kernel {
|
||||
};
|
||||
};
|
||||
|
||||
modem-smp2p {
|
||||
compatible = "qcom,smp2p";
|
||||
qcom,smem = <435>, <428>;
|
||||
|
||||
interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,ipc = <&apcs 16 14>;
|
||||
|
||||
qcom,local-pid = <0>;
|
||||
qcom,remote-pid = <1>;
|
||||
|
||||
modem_smp2p_out: master-kernel {
|
||||
qcom,entry-name = "master-kernel";
|
||||
#qcom,smem-state-cells = <1>;
|
||||
};
|
||||
|
||||
modem_smp2p_in: slave-kernel {
|
||||
qcom,entry-name = "slave-kernel";
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
smp2p-slpi {
|
||||
compatible = "qcom,smp2p";
|
||||
qcom,smem = <481>, <430>;
|
||||
|
||||
@ -8,6 +8,23 @@ pmic@2 {
|
||||
reg = <0x2 SPMI_USID>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pmi8994_gpios: gpios@c000 {
|
||||
compatible = "qcom,pmi8994-gpio", "qcom,spmi-gpio";
|
||||
reg = <0xc000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <2 0xc0 0 IRQ_TYPE_NONE>,
|
||||
<2 0xc1 0 IRQ_TYPE_NONE>,
|
||||
<2 0xc2 0 IRQ_TYPE_NONE>,
|
||||
<2 0xc3 0 IRQ_TYPE_NONE>,
|
||||
<2 0xc4 0 IRQ_TYPE_NONE>,
|
||||
<2 0xc5 0 IRQ_TYPE_NONE>,
|
||||
<2 0xc6 0 IRQ_TYPE_NONE>,
|
||||
<2 0xc7 0 IRQ_TYPE_NONE>,
|
||||
<2 0xc8 0 IRQ_TYPE_NONE>,
|
||||
<2 0xc9 0 IRQ_TYPE_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
pmic@3 {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user