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ARM: shmobile: r8a7779: Use MSTP for SCIF clocks

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Hook up MSTP clocks to SCIF devices on r8a7779 to allow
clock gating to work as expected.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Magnus Damm 2014-12-15 13:56:08 +09:00 committed by Simon Horman
parent c6ce3cdfce
commit 631324cf83
1 changed files with 6 additions and 6 deletions
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12
arch/arm/boot/dts/r8a7779.dtsi
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@ -200,7 +200,7 @@ scif0: serial@ffe40000 {
compatible = "renesas,scif-r8a7779", "renesas,scif";
reg = <0xffe40000 0x100>;
interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg_clocks R8A7779_CLK_P>;
clocks = <&mstp0_clks R8A7779_CLK_SCIF0>;
clock-names = "sci_ick";
status = "disabled";
};
@ -209,7 +209,7 @@ scif1: serial@ffe41000 {
compatible = "renesas,scif-r8a7779", "renesas,scif";
reg = <0xffe41000 0x100>;
interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg_clocks R8A7779_CLK_P>;
clocks = <&mstp0_clks R8A7779_CLK_SCIF1>;
clock-names = "sci_ick";
status = "disabled";
};
@ -218,7 +218,7 @@ scif2: serial@ffe42000 {
compatible = "renesas,scif-r8a7779", "renesas,scif";
reg = <0xffe42000 0x100>;
interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg_clocks R8A7779_CLK_P>;
clocks = <&mstp0_clks R8A7779_CLK_SCIF2>;
clock-names = "sci_ick";
status = "disabled";
};
@ -227,7 +227,7 @@ scif3: serial@ffe43000 {
compatible = "renesas,scif-r8a7779", "renesas,scif";
reg = <0xffe43000 0x100>;
interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg_clocks R8A7779_CLK_P>;
clocks = <&mstp0_clks R8A7779_CLK_SCIF3>;
clock-names = "sci_ick";
status = "disabled";
};
@ -236,7 +236,7 @@ scif4: serial@ffe44000 {
compatible = "renesas,scif-r8a7779", "renesas,scif";
reg = <0xffe44000 0x100>;
interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg_clocks R8A7779_CLK_P>;
clocks = <&mstp0_clks R8A7779_CLK_SCIF4>;
clock-names = "sci_ick";
status = "disabled";
};
@ -245,7 +245,7 @@ scif5: serial@ffe45000 {
compatible = "renesas,scif-r8a7779", "renesas,scif";
reg = <0xffe45000 0x100>;
interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg_clocks R8A7779_CLK_P>;
clocks = <&mstp0_clks R8A7779_CLK_SCIF5>;
clock-names = "sci_ick";
status = "disabled";
};