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Miscellaneous DaVinci SoC support improvements for v4.17

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* rationalization of con_id names for phy clocks to make DT conversion easy
 
 * A patch to move away from syscon as platform device. This is needed for
   common clock framework conversion as well as helps get rid of
   syscon_regmap_lookup_by_pdevname() by removing the last known user.
 
 * convert mach-davinci to use reset support available in watchdog driver
 
 * a non-critical warning fix. It has been around since beginning so not sending
   as a standalone fix for -rc cycle.
 
 * moving mach-davinci clock init to .init_time() for legacy boot. This is
   again in preparation for CCF conversion.
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Merge tag 'davinci-for-v4.17/soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc

Pull "Miscellaneous DaVinci SoC support improvements for v4.17" from Sekhar Nori:

* rationalization of con_id names for phy clocks to make DT conversion easy

* A patch to move away from syscon as platform device. This is needed for
  common clock framework conversion as well as helps get rid of
  syscon_regmap_lookup_by_pdevname() by removing the last known user.

* convert mach-davinci to use reset support available in watchdog driver

* a non-critical warning fix. It has been around since beginning so not sending
  as a standalone fix for -rc cycle.

* moving mach-davinci clock init to .init_time() for legacy boot. This is
  again in preparation for CCF conversion.

* tag 'davinci-for-v4.17/soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: move davinci_clk_init() to init_time
  ARM: davinci: board-da830-evm: fix unused const variable warning
  ARM: davinci: remove watchdog reset
  ARM: da8xx: use platform data for CFGCHIP syscon regmap
  phy: da8xx-usb: rename clock con_ids
This commit is contained in:
Arnd Bergmann 2018-03-07 16:01:34 +01:00
commit 62a295bd82
28 changed files with 157 additions and 202 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

35
arch/arm/mach-davinci/board-da830-evm.c
View File

@ -239,20 +239,6 @@ static inline void da830_evm_init_mmc(void)
}
}
/*
* UI board NAND/NOR flashes only use 8-bit data bus.
*/
static const short da830_evm_emif25_pins[] = {
DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
-1
};
#define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI)
#ifdef CONFIG_DA830_UI_NAND
@ -357,6 +343,20 @@ static struct platform_device da830_evm_nand_device = {
.resource = da830_evm_nand_resources,
};
/*
* UI board NAND/NOR flashes only use 8-bit data bus.
*/
static const short da830_evm_emif25_pins[] = {
DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
-1
};
static inline void da830_evm_init_nand(int mux_mode)
{
int ret;
@ -551,10 +551,6 @@ static __init void da830_evm_init(void)
struct davinci_soc_info *soc_info = &davinci_soc_info;
int ret;
ret = da8xx_register_cfgchip();
if (ret)
pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
ret = da830_register_gpio();
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
@ -638,9 +634,8 @@ MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
.atag_offset = 0x100,
.map_io = da830_evm_map_io,
.init_irq = cp_intc_init,
.init_time = davinci_timer_init,
.init_time = da830_init_time,
.init_machine = da830_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
.restart = da8xx_restart,
MACHINE_END

7
arch/arm/mach-davinci/board-da850-evm.c
View File

@ -1334,10 +1334,6 @@ static __init void da850_evm_init(void)
{
int ret;
ret = da8xx_register_cfgchip();
if (ret)
pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
ret = da850_register_gpio();
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
@ -1481,10 +1477,9 @@ MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
.atag_offset = 0x100,
.map_io = da850_evm_map_io,
.init_irq = cp_intc_init,
.init_time = davinci_timer_init,
.init_time = da850_init_time,
.init_machine = da850_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
.restart = da8xx_restart,
.reserve = da8xx_rproc_reserve_cma,
MACHINE_END

3
arch/arm/mach-davinci/board-dm355-evm.c
View File

@ -427,9 +427,8 @@ MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
.atag_offset = 0x100,
.map_io = dm355_evm_map_io,
.init_irq = davinci_irq_init,
.init_time = davinci_timer_init,
.init_time = dm355_init_time,
.init_machine = dm355_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
.restart = davinci_restart,
MACHINE_END

3
arch/arm/mach-davinci/board-dm355-leopard.c
View File

@ -271,9 +271,8 @@ MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
.atag_offset = 0x100,
.map_io = dm355_leopard_map_io,
.init_irq = davinci_irq_init,
.init_time = davinci_timer_init,
.init_time = dm355_init_time,
.init_machine = dm355_leopard_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
.restart = davinci_restart,
MACHINE_END

3
arch/arm/mach-davinci/board-dm365-evm.c
View File

@ -774,10 +774,9 @@ MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
.atag_offset = 0x100,
.map_io = dm365_evm_map_io,
.init_irq = davinci_irq_init,
.init_time = davinci_timer_init,
.init_time = dm365_init_time,
.init_machine = dm365_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
.restart = davinci_restart,
MACHINE_END

3
arch/arm/mach-davinci/board-dm644x-evm.c
View File

@ -828,9 +828,8 @@ MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
.atag_offset = 0x100,
.map_io = davinci_evm_map_io,
.init_irq = davinci_irq_init,
.init_time = davinci_timer_init,
.init_time = dm644x_init_time,
.init_machine = davinci_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
.restart = davinci_restart,
MACHINE_END

21
arch/arm/mach-davinci/board-dm646x-evm.c
View File

@ -44,10 +44,8 @@
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/serial.h>
#include <mach/clock.h>
#include "davinci.h"
#include "clock.h"
#define NAND_BLOCK_SIZE SZ_128K
@ -716,14 +714,23 @@ static void __init evm_init_i2c(void)
}
#endif
#define DM646X_REF_FREQ 27000000
#define DM646X_AUX_FREQ 24000000
#define DM6467T_EVM_REF_FREQ 33000000
static void __init davinci_map_io(void)
{
dm646x_init();
}
if (machine_is_davinci_dm6467tevm())
davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
static void __init dm646x_evm_init_time(void)
{
dm646x_init_time(DM646X_REF_FREQ, DM646X_AUX_FREQ);
}
static void __init dm6467t_evm_init_time(void)
{
dm646x_init_time(DM6467T_EVM_REF_FREQ, DM646X_AUX_FREQ);
}
#define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
@ -797,21 +804,19 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
.atag_offset = 0x100,
.map_io = davinci_map_io,
.init_irq = davinci_irq_init,
.init_time = davinci_timer_init,
.init_time = dm646x_evm_init_time,
.init_machine = evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
.restart = davinci_restart,
MACHINE_END
MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
.atag_offset = 0x100,
.map_io = davinci_map_io,
.init_irq = davinci_irq_init,
.init_time = davinci_timer_init,
.init_time = dm6467t_evm_init_time,
.init_machine = evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
.restart = davinci_restart,
MACHINE_END

7
arch/arm/mach-davinci/board-mityomapl138.c
View File

@ -502,10 +502,6 @@ static void __init mityomapl138_init(void)
{
int ret;
ret = da8xx_register_cfgchip();
if (ret)
pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
/* for now, no special EDMA channels are reserved */
ret = da850_register_edma(NULL);
if (ret)
@ -570,9 +566,8 @@ MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
.atag_offset = 0x100,
.map_io = mityomapl138_map_io,
.init_irq = cp_intc_init,
.init_time = davinci_timer_init,
.init_time = da850_init_time,
.init_machine = mityomapl138_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
.restart = da8xx_restart,
MACHINE_END

3
arch/arm/mach-davinci/board-neuros-osd2.c
View File

@ -227,9 +227,8 @@ MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
.atag_offset = 0x100,
.map_io = davinci_ntosd2_map_io,
.init_irq = davinci_irq_init,
.init_time = davinci_timer_init,
.init_time = dm644x_init_time,
.init_machine = davinci_ntosd2_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
.restart = davinci_restart,
MACHINE_END

7
arch/arm/mach-davinci/board-omapl138-hawk.c
View File

@ -281,10 +281,6 @@ static __init void omapl138_hawk_init(void)
{
int ret;
ret = da8xx_register_cfgchip();
if (ret)
pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
ret = da850_register_gpio();
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
@ -334,10 +330,9 @@ MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
.atag_offset = 0x100,
.map_io = omapl138_hawk_map_io,
.init_irq = cp_intc_init,
.init_time = davinci_timer_init,
.init_time = da850_init_time,
.init_machine = omapl138_hawk_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
.restart = da8xx_restart,
.reserve = da8xx_rproc_reserve_cma,
MACHINE_END

3
arch/arm/mach-davinci/board-sffsdr.c
View File

@ -150,9 +150,8 @@ MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
.atag_offset = 0x100,
.map_io = davinci_sffsdr_map_io,
.init_irq = davinci_irq_init,
.init_time = davinci_timer_init,
.init_time = dm644x_init_time,
.init_machine = davinci_sffsdr_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
.restart = davinci_restart,
MACHINE_END

3
arch/arm/mach-davinci/clock.h
View File

@ -135,9 +135,6 @@ int davinci_clk_reset(struct clk *clk, bool reset);
void davinci_clk_enable(struct clk *clk);
void davinci_clk_disable(struct clk *clk);
extern struct platform_device davinci_wdt_device;
extern void davinci_watchdog_reset(struct platform_device *);
#endif
#endif

9
arch/arm/mach-davinci/da830.c
View File

@ -1200,7 +1200,6 @@ static const struct davinci_soc_info davinci_soc_info_da830 = {
.jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,
.ids = da830_ids,
.ids_num = ARRAY_SIZE(da830_ids),
.cpu_clks = da830_clks,
.psc_bases = da830_psc_bases,
.psc_bases_num = ARRAY_SIZE(da830_psc_bases),
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
@ -1220,6 +1219,10 @@ void __init da830_init(void)
da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K);
WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");
davinci_clk_init(davinci_soc_info_da830.cpu_clks);
}
void __init da830_init_time(void)
{
davinci_clk_init(da830_clks);
davinci_timer_init();
}

9
arch/arm/mach-davinci/da850.c
View File

@ -1353,7 +1353,6 @@ static const struct davinci_soc_info davinci_soc_info_da850 = {
.jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,
.ids = da850_ids,
.ids_num = ARRAY_SIZE(da850_ids),
.cpu_clks = da850_clks,
.psc_bases = da850_psc_bases,
.psc_bases_num = ARRAY_SIZE(da850_psc_bases),
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
@ -1392,6 +1391,10 @@ void __init da850_init(void)
v = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG));
v &= ~CFGCHIP3_PLL1_MASTER_LOCK;
__raw_writel(v, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG));
davinci_clk_init(davinci_soc_info_da850.cpu_clks);
}
void __init da850_init_time(void)
{
davinci_clk_init(da850_clks);
davinci_timer_init();
}

3
arch/arm/mach-davinci/da8xx-dt.c
View File

@ -96,11 +96,10 @@ static const char *const da850_boards_compat[] __initconst = {
DT_MACHINE_START(DA850_DT, "Generic DA850/OMAP-L138/AM18x")
.map_io = da850_init,
.init_time = davinci_timer_init,
.init_time = da850_init_time,
.init_machine = da850_init_machine,
.dt_compat = da850_boards_compat,
.init_late = davinci_init_late,
.restart = da8xx_restart,
MACHINE_END
#endif

4
arch/arm/mach-davinci/davinci.h
View File

@ -83,6 +83,7 @@ int davinci_init_wdt(void);
/* DM355 function declarations */
void dm355_init(void);
void dm355_init_time(void);
void dm355_init_spi0(unsigned chipselect_mask,
const struct spi_board_info *info, unsigned len);
void dm355_init_asp1(u32 evt_enable);
@ -91,6 +92,7 @@ int dm355_gpio_register(void);
/* DM365 function declarations */
void dm365_init(void);
void dm365_init_time(void);
void dm365_init_asp(void);
void dm365_init_vc(void);
void dm365_init_ks(struct davinci_ks_platform_data *pdata);
@ -102,12 +104,14 @@ int dm365_gpio_register(void);
/* DM644x function declarations */
void dm644x_init(void);
void dm644x_init_time(void);
void dm644x_init_asp(void);
int dm644x_init_video(struct vpfe_config *, struct vpbe_config *);
int dm644x_gpio_register(void);
/* DM646x function declarations */
void dm646x_init(void);
void dm646x_init_time(unsigned long ref_clk_rate, unsigned long aux_clkin_rate);
void dm646x_init_mcasp0(struct snd_platform_data *pdata);
void dm646x_init_mcasp1(struct snd_platform_data *pdata);
int dm646x_init_edma(struct edma_rsv_info *rsv);

60
arch/arm/mach-davinci/devices-da8xx.c
View File

@ -11,7 +11,6 @@
* (at your option) any later version.
*/
#include <linux/init.h>
#include <linux/platform_data/syscon.h>
#include <linux/platform_device.h>
#include <linux/dma-contiguous.h>
#include <linux/serial_8250.h>
@ -371,19 +370,6 @@ static struct platform_device da8xx_wdt_device = {
.resource = da8xx_watchdog_resources,
};
void da8xx_restart(enum reboot_mode mode, const char *cmd)
{
struct device *dev;
dev = bus_find_device_by_name(&platform_bus_type, NULL, "davinci-wdt");
if (!dev) {
pr_err("%s: failed to find watchdog device\n", __func__);
return;
}
davinci_watchdog_reset(to_platform_device(dev));
}
int __init da8xx_register_watchdog(void)
{
return platform_device_register(&da8xx_wdt_device);
@ -1118,29 +1104,33 @@ int __init da850_register_sata(unsigned long refclkpn)
}
#endif
static struct syscon_platform_data da8xx_cfgchip_platform_data = {
.label = "cfgchip",
static struct regmap *da8xx_cfgchip;
/* regmap doesn't make a copy of this, so we need to keep the pointer around */
static const char da8xx_cfgchip_name[] = "cfgchip";
static const struct regmap_config da8xx_cfgchip_config __initconst = {
.name = da8xx_cfgchip_name,
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
.max_register = DA8XX_CFGCHIP4_REG - DA8XX_CFGCHIP0_REG,
};
static struct resource da8xx_cfgchip_resources[] = {
/**
* da8xx_get_cfgchip - Lazy gets CFGCHIP as regmap
*
* This is for use on non-DT boards only. For DT boards, use
* syscon_regmap_lookup_by_compatible("ti,da830-cfgchip")
*
* Returns: Pointer to the CFGCHIP regmap or negative error code.
*/
struct regmap * __init da8xx_get_cfgchip(void)
{
.start = DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP0_REG,
.end = DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP4_REG + 3,
.flags = IORESOURCE_MEM,
},
};
if (IS_ERR_OR_NULL(da8xx_cfgchip))
da8xx_cfgchip = regmap_init_mmio(NULL,
DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP0_REG),
&da8xx_cfgchip_config);
static struct platform_device da8xx_cfgchip_device = {
.name = "syscon",
.id = -1,
.dev = {
.platform_data = &da8xx_cfgchip_platform_data,
},
.num_resources = ARRAY_SIZE(da8xx_cfgchip_resources),
.resource = da8xx_cfgchip_resources,
};
int __init da8xx_register_cfgchip(void)
{
return platform_device_register(&da8xx_cfgchip_device);
return da8xx_cfgchip;
}

7
arch/arm/mach-davinci/devices.c
View File

@ -282,18 +282,13 @@ static struct resource wdt_resources[] = {
},
};
struct platform_device davinci_wdt_device = {
static struct platform_device davinci_wdt_device = {
.name = "davinci-wdt",
.id = -1,
.num_resources = ARRAY_SIZE(wdt_resources),
.resource = wdt_resources,
};
void davinci_restart(enum reboot_mode mode, const char *cmd)
{
davinci_watchdog_reset(&davinci_wdt_device);
}
int davinci_init_wdt(void)
{
return platform_device_register(&davinci_wdt_device);

8
arch/arm/mach-davinci/dm355.c
View File

@ -1012,7 +1012,6 @@ static const struct davinci_soc_info davinci_soc_info_dm355 = {
.jtag_id_reg = 0x01c40028,
.ids = dm355_ids,
.ids_num = ARRAY_SIZE(dm355_ids),
.cpu_clks = dm355_clks,
.psc_bases = dm355_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm355_psc_bases),
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
@ -1043,7 +1042,12 @@ void __init dm355_init(void)
{
davinci_common_init(&davinci_soc_info_dm355);
davinci_map_sysmod();
davinci_clk_init(davinci_soc_info_dm355.cpu_clks);
}
void __init dm355_init_time(void)
{
davinci_clk_init(dm355_clks);
davinci_timer_init();
}
int __init dm355_init_video(struct vpfe_config *vpfe_cfg,

8
arch/arm/mach-davinci/dm365.c
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@ -1116,7 +1116,6 @@ static const struct davinci_soc_info davinci_soc_info_dm365 = {
.jtag_id_reg = 0x01c40028,
.ids = dm365_ids,
.ids_num = ARRAY_SIZE(dm365_ids),
.cpu_clks = dm365_clks,
.psc_bases = dm365_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm365_psc_bases),
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
@ -1168,7 +1167,12 @@ void __init dm365_init(void)
{
davinci_common_init(&davinci_soc_info_dm365);
davinci_map_sysmod();
davinci_clk_init(davinci_soc_info_dm365.cpu_clks);
}
void __init dm365_init_time(void)
{
davinci_clk_init(dm365_clks);
davinci_timer_init();
}
static struct resource dm365_vpss_resources[] = {

8
arch/arm/mach-davinci/dm644x.c
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@ -905,7 +905,6 @@ static const struct davinci_soc_info davinci_soc_info_dm644x = {
.jtag_id_reg = 0x01c40028,
.ids = dm644x_ids,
.ids_num = ARRAY_SIZE(dm644x_ids),
.cpu_clks = dm644x_clks,
.psc_bases = dm644x_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm644x_psc_bases),
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
@ -931,7 +930,12 @@ void __init dm644x_init(void)
{
davinci_common_init(&davinci_soc_info_dm644x);
davinci_map_sysmod();
davinci_clk_init(davinci_soc_info_dm644x.cpu_clks);
}
void __init dm644x_init_time(void)
{
davinci_clk_init(dm644x_clks);
davinci_timer_init();
}
int __init dm644x_init_video(struct vpfe_config *vpfe_cfg,

22
arch/arm/mach-davinci/dm646x.c
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@ -39,12 +39,6 @@
#define VSCLKDIS_MASK (BIT_MASK(11) | BIT_MASK(10) | BIT_MASK(9) |\
BIT_MASK(8))
/*
* Device specific clocks
*/
#define DM646X_REF_FREQ 27000000
#define DM646X_AUX_FREQ 24000000
#define DM646X_EMAC_BASE 0x01c80000
#define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000)
#define DM646X_EMAC_CNTRL_OFFSET 0x0000
@ -64,13 +58,12 @@ static struct pll_data pll2_data = {
static struct clk ref_clk = {
.name = "ref_clk",
.rate = DM646X_REF_FREQ,
.set_rate = davinci_simple_set_rate,
/* rate is initialized in dm646x_init_time() */
};
static struct clk aux_clkin = {
.name = "aux_clkin",
.rate = DM646X_AUX_FREQ,
/* rate is initialized in dm646x_init_time() */
};
static struct clk pll1_clk = {
@ -888,7 +881,6 @@ static const struct davinci_soc_info davinci_soc_info_dm646x = {
.jtag_id_reg = 0x01c40028,
.ids = dm646x_ids,
.ids_num = ARRAY_SIZE(dm646x_ids),
.cpu_clks = dm646x_clks,
.psc_bases = dm646x_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm646x_psc_bases),
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
@ -956,7 +948,15 @@ void __init dm646x_init(void)
{
davinci_common_init(&davinci_soc_info_dm646x);
davinci_map_sysmod();
davinci_clk_init(davinci_soc_info_dm646x.cpu_clks);
}
void __init dm646x_init_time(unsigned long ref_clk_rate,
unsigned long aux_clkin_rate)
{
ref_clk.rate = ref_clk_rate;
aux_clkin.rate = aux_clkin_rate;
davinci_clk_init(dm646x_clks);
davinci_timer_init();
}
static int __init dm646x_init_devices(void)

2
arch/arm/mach-davinci/include/mach/common.h
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@ -53,7 +53,6 @@ struct davinci_soc_info {
u32 jtag_id_reg;
struct davinci_id *ids;
unsigned long ids_num;
struct clk_lookup *cpu_clks;
u32 *psc_bases;
unsigned long psc_bases_num;
u32 pinmux_base;
@ -81,7 +80,6 @@ extern struct davinci_soc_info davinci_soc_info;
extern void davinci_common_init(const struct davinci_soc_info *soc_info);
extern void davinci_init_ide(void);
void davinci_restart(enum reboot_mode mode, const char *cmd);
void davinci_init_late(void);
#ifdef CONFIG_DAVINCI_RESET_CLOCKS

7
arch/arm/mach-davinci/include/mach/da8xx.h
View File

@ -18,6 +18,7 @@
#include <linux/spi/spi.h>
#include <linux/platform_data/davinci_asp.h>
#include <linux/reboot.h>
#include <linux/regmap.h>
#include <linux/videodev2.h>
#include <mach/serial.h>
@ -87,7 +88,10 @@ extern unsigned int da850_max_speed;
#define DA8XX_ARM_RAM_BASE 0xffff0000
void da830_init(void);
void da830_init_time(void);
void da850_init(void);
void da850_init_time(void);
int da830_register_edma(struct edma_rsv_info *rsv);
int da850_register_edma(struct edma_rsv_info *rsv[2]);
@ -118,12 +122,11 @@ int da850_register_vpif_display
(struct vpif_display_config *display_config);
int da850_register_vpif_capture
(struct vpif_capture_config *capture_config);
void da8xx_restart(enum reboot_mode mode, const char *cmd);
void da8xx_rproc_reserve_cma(void);
int da8xx_register_rproc(void);
int da850_register_gpio(void);
int da830_register_gpio(void);
int da8xx_register_cfgchip(void);
struct regmap *da8xx_get_cfgchip(void);
extern struct platform_device da8xx_serial_device[];
extern struct emac_platform_data da8xx_emac_pdata;

57
arch/arm/mach-davinci/time.c
View File

@ -80,13 +80,6 @@ enum {
#define TGCR_UNRESET 0x1
#define TGCR_RESET_MASK 0x3
#define WDTCR_WDEN_SHIFT 14
#define WDTCR_WDEN_DISABLE 0x0
#define WDTCR_WDEN_ENABLE 0x1
#define WDTCR_WDKEY_SHIFT 16
#define WDTCR_WDKEY_SEQ0 0xa5c6
#define WDTCR_WDKEY_SEQ1 0xda7e
struct timer_s {
char *name;
unsigned int id;
@ -409,53 +402,3 @@ void __init davinci_timer_init(void)
for (i=0; i< ARRAY_SIZE(timers); i++)
timer32_config(&timers[i]);
}
/* reset board using watchdog timer */
void davinci_watchdog_reset(struct platform_device *pdev)
{
u32 tgcr, wdtcr;
void __iomem *base;
struct clk *wd_clk;
base = ioremap(pdev->resource[0].start, SZ_4K);
if (WARN_ON(!base))
return;
wd_clk = clk_get(&pdev->dev, NULL);
if (WARN_ON(IS_ERR(wd_clk)))
return;
clk_prepare_enable(wd_clk);
/* disable, internal clock source */
__raw_writel(0, base + TCR);
/* reset timer, set mode to 64-bit watchdog, and unreset */
tgcr = 0;
__raw_writel(tgcr, base + TGCR);
tgcr = TGCR_TIMMODE_64BIT_WDOG << TGCR_TIMMODE_SHIFT;
tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) |
(TGCR_UNRESET << TGCR_TIM34RS_SHIFT);
__raw_writel(tgcr, base + TGCR);
/* clear counter and period regs */
__raw_writel(0, base + TIM12);
__raw_writel(0, base + TIM34);
__raw_writel(0, base + PRD12);
__raw_writel(0, base + PRD34);
/* put watchdog in pre-active state */
wdtcr = __raw_readl(base + WDTCR);
wdtcr = (WDTCR_WDKEY_SEQ0 << WDTCR_WDKEY_SHIFT) |
(WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT);
__raw_writel(wdtcr, base + WDTCR);
/* put watchdog in active state */
wdtcr = (WDTCR_WDKEY_SEQ1 << WDTCR_WDKEY_SHIFT) |
(WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT);
__raw_writel(wdtcr, base + WDTCR);
/* write an invalid value to the WDKEY field to trigger
* a watchdog reset */
wdtcr = 0x00004000;
__raw_writel(wdtcr, base + WDTCR);
}

18
arch/arm/mach-davinci/usb-da8xx.c
View File

@ -8,6 +8,7 @@
#include <linux/init.h>
#include <linux/mfd/da8xx-cfgchip.h>
#include <linux/phy/phy.h>
#include <linux/platform_data/phy-da8xx-usb.h>
#include <linux/platform_data/usb-davinci.h>
#include <linux/platform_device.h>
#include <linux/usb/musb.h>
@ -40,6 +41,11 @@ static struct platform_device da8xx_usb_phy = {
int __init da8xx_register_usb_phy(void)
{
struct da8xx_usb_phy_platform_data pdata;
pdata.cfgchip = da8xx_get_cfgchip();
da8xx_usb_phy.dev.platform_data = &pdata;
return platform_device_register(&da8xx_usb_phy);
}
@ -256,14 +262,14 @@ static int usb20_phy_clk_set_parent(struct clk *clk, struct clk *parent)
}
static struct clk usb20_phy_clk = {
.name = "usb20_phy",
.name = "usb0_clk48",
.clk_enable = usb20_phy_clk_enable,
.clk_disable = usb20_phy_clk_disable,
.set_parent = usb20_phy_clk_set_parent,
};
static struct clk_lookup usb20_phy_clk_lookup =
CLK("da8xx-usb-phy", "usb20_phy", &usb20_phy_clk);
CLK("da8xx-usb-phy", "usb0_clk48", &usb20_phy_clk);
/**
* da8xx_register_usb20_phy_clk - register USB0PHYCLKMUX clock
@ -320,18 +326,18 @@ static int usb11_phy_clk_set_parent(struct clk *clk, struct clk *parent)
}
static struct clk usb11_phy_clk = {
.name = "usb11_phy",
.name = "usb1_clk48",
.set_parent = usb11_phy_clk_set_parent,
};
static struct clk_lookup usb11_phy_clk_lookup =
CLK("da8xx-usb-phy", "usb11_phy", &usb11_phy_clk);
CLK("da8xx-usb-phy", "usb1_clk48", &usb11_phy_clk);
/**
* da8xx_register_usb11_phy_clk - register USB1PHYCLKMUX clock
*
* @use_usb_refclkin: Selects the parent clock - either "usb_refclkin" if true
* or "usb20_phy" if false.
* or "usb0_clk48" if false.
*/
int __init da8xx_register_usb11_phy_clk(bool use_usb_refclkin)
{
@ -341,7 +347,7 @@ int __init da8xx_register_usb11_phy_clk(bool use_usb_refclkin)
if (use_usb_refclkin)
parent = clk_get(NULL, "usb_refclkin");
else
parent = clk_get(&da8xx_usb_phy.dev, "usb20_phy");
parent = clk_get(&da8xx_usb_phy.dev, "usb0_clk48");
if (IS_ERR(parent))
return PTR_ERR(parent);

16
drivers/phy/ti/phy-da8xx-usb.c
View File

@ -20,6 +20,7 @@
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/phy/phy.h>
#include <linux/platform_data/phy-da8xx-usb.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
@ -145,6 +146,7 @@ static struct phy *da8xx_usb_phy_of_xlate(struct device *dev,
static int da8xx_usb_phy_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct da8xx_usb_phy_platform_data *pdata = dev->platform_data;
struct device_node *node = dev->of_node;
struct da8xx_usb_phy *d_phy;
@ -152,25 +154,25 @@ static int da8xx_usb_phy_probe(struct platform_device *pdev)
if (!d_phy)
return -ENOMEM;
if (node)
if (pdata)
d_phy->regmap = pdata->cfgchip;
else
d_phy->regmap = syscon_regmap_lookup_by_compatible(
"ti,da830-cfgchip");
else
d_phy->regmap = syscon_regmap_lookup_by_pdevname("syscon");
if (IS_ERR(d_phy->regmap)) {
dev_err(dev, "Failed to get syscon\n");
return PTR_ERR(d_phy->regmap);
}
d_phy->usb11_clk = devm_clk_get(dev, "usb11_phy");
d_phy->usb11_clk = devm_clk_get(dev, "usb1_clk48");
if (IS_ERR(d_phy->usb11_clk)) {
dev_err(dev, "Failed to get usb11_phy clock\n");
dev_err(dev, "Failed to get usb1_clk48\n");
return PTR_ERR(d_phy->usb11_clk);
}
d_phy->usb20_clk = devm_clk_get(dev, "usb20_phy");
d_phy->usb20_clk = devm_clk_get(dev, "usb0_clk48");
if (IS_ERR(d_phy->usb20_clk)) {
dev_err(dev, "Failed to get usb20_phy clock\n");
dev_err(dev, "Failed to get usb0_clk48\n");
return PTR_ERR(d_phy->usb20_clk);
}

21
include/linux/platform_data/phy-da8xx-usb.h Normal file
View File

@ -0,0 +1,21 @@
// SPDX-License-Identifier: GPL-2.0
/*
* phy-da8xx-usb - TI DaVinci DA8xx USB PHY driver
*
* Copyright (C) 2018 David Lechner <david@lechnology.com>
*/
#ifndef __LINUX_PLATFORM_DATA_PHY_DA8XX_USB_H__
#define __LINUX_PLATFORM_DATA_PHY_DA8XX_USB_H__
#include <linux/regmap.h>
/**
* da8xx_usb_phy_platform_data
* @cfgchip: CFGCHIP syscon regmap
*/
struct da8xx_usb_phy_platform_data {
struct regmap *cfgchip;
};
#endif /* __LINUX_PLATFORM_DATA_PHY_DA8XX_USB_H__ */