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drm/i915/icl: Fix signal_levels

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Since when it was introduced we forgot to add
this case so ICL was using a wrong signal_levels
as reference.

Fixes: fb5c8e9d43 ("drm/i915/icl: Implement voltage swing programming sequence for Combo PHY DDI")
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181017215652.26841-1-rodrigo.vivi@intel.com
This commit is contained in:
Rodrigo Vivi 2018-10-17 14:56:52 -07:00
parent 39b50c6038
commit 61cdfb9e19
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/i915/intel_dp.c
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@ -3790,7 +3790,7 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp)
uint32_t signal_levels, mask = 0;
uint8_t train_set = intel_dp->train_set[0];
if (IS_GEN9_LP(dev_priv) || IS_CANNONLAKE(dev_priv)) {
if (IS_GEN9_LP(dev_priv) || INTEL_GEN(dev_priv) >= 10) {
signal_levels = bxt_signal_levels(intel_dp);
} else if (HAS_DDI(dev_priv)) {
signal_levels = ddi_signal_levels(intel_dp);