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docs: bus-devices: ti-gpmc.rst: convert it to ReST
In order to be able to add this file to a book, it needs first to be converted to ReST and renamed. While this is not part of any book, mark it as :orphan:, in order to avoid build warnings. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
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Mauro Carvalho Chehab
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@ -1,8 +1,12 @@
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GPMC (General Purpose Memory Controller):
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=========================================
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:orphan:
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========================================
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GPMC (General Purpose Memory Controller)
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========================================
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GPMC is an unified memory controller dedicated to interfacing external
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memory devices like
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* Asynchronous SRAM like memories and application specific integrated
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circuit devices.
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* Asynchronous, synchronous, and page mode burst NOR flash devices
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@ -48,75 +52,128 @@ most of the datasheets & hardware (to be exact none of those supported
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in mainline having custom timing routine) and by simulation.
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gpmc timing dependency on peripheral timings:
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[<gpmc_timing>: <peripheral timing1>, <peripheral timing2> ...]
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1. common
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cs_on: t_ceasu
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adv_on: t_avdasu, t_ceavd
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cs_on:
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t_ceasu
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adv_on:
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t_avdasu, t_ceavd
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2. sync common
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sync_clk: clk
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page_burst_access: t_bacc
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clk_activation: t_ces, t_avds
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sync_clk:
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clk
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page_burst_access:
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t_bacc
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clk_activation:
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t_ces, t_avds
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3. read async muxed
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adv_rd_off: t_avdp_r
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oe_on: t_oeasu, t_aavdh
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access: t_iaa, t_oe, t_ce, t_aa
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rd_cycle: t_rd_cycle, t_cez_r, t_oez
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adv_rd_off:
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t_avdp_r
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oe_on:
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t_oeasu, t_aavdh
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access:
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t_iaa, t_oe, t_ce, t_aa
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rd_cycle:
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t_rd_cycle, t_cez_r, t_oez
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4. read async non-muxed
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adv_rd_off: t_avdp_r
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oe_on: t_oeasu
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access: t_iaa, t_oe, t_ce, t_aa
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rd_cycle: t_rd_cycle, t_cez_r, t_oez
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adv_rd_off:
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t_avdp_r
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oe_on:
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t_oeasu
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access:
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t_iaa, t_oe, t_ce, t_aa
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rd_cycle:
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t_rd_cycle, t_cez_r, t_oez
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5. read sync muxed
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adv_rd_off: t_avdp_r, t_avdh
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oe_on: t_oeasu, t_ach, cyc_aavdh_oe
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access: t_iaa, cyc_iaa, cyc_oe
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rd_cycle: t_cez_r, t_oez, t_ce_rdyz
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adv_rd_off:
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t_avdp_r, t_avdh
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oe_on:
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t_oeasu, t_ach, cyc_aavdh_oe
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access:
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t_iaa, cyc_iaa, cyc_oe
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rd_cycle:
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t_cez_r, t_oez, t_ce_rdyz
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6. read sync non-muxed
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adv_rd_off: t_avdp_r
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oe_on: t_oeasu
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access: t_iaa, cyc_iaa, cyc_oe
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rd_cycle: t_cez_r, t_oez, t_ce_rdyz
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adv_rd_off:
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t_avdp_r
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oe_on:
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t_oeasu
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access:
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t_iaa, cyc_iaa, cyc_oe
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rd_cycle:
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t_cez_r, t_oez, t_ce_rdyz
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7. write async muxed
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adv_wr_off: t_avdp_w
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we_on, wr_data_mux_bus: t_weasu, t_aavdh, cyc_aavhd_we
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we_off: t_wpl
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cs_wr_off: t_wph
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wr_cycle: t_cez_w, t_wr_cycle
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adv_wr_off:
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t_avdp_w
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we_on, wr_data_mux_bus:
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t_weasu, t_aavdh, cyc_aavhd_we
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we_off:
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t_wpl
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cs_wr_off:
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t_wph
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wr_cycle:
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t_cez_w, t_wr_cycle
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8. write async non-muxed
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adv_wr_off: t_avdp_w
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we_on, wr_data_mux_bus: t_weasu
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we_off: t_wpl
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cs_wr_off: t_wph
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wr_cycle: t_cez_w, t_wr_cycle
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adv_wr_off:
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t_avdp_w
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we_on, wr_data_mux_bus:
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t_weasu
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we_off:
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t_wpl
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cs_wr_off:
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t_wph
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wr_cycle:
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t_cez_w, t_wr_cycle
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9. write sync muxed
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adv_wr_off: t_avdp_w, t_avdh
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we_on, wr_data_mux_bus: t_weasu, t_rdyo, t_aavdh, cyc_aavhd_we
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we_off: t_wpl, cyc_wpl
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cs_wr_off: t_wph
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wr_cycle: t_cez_w, t_ce_rdyz
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adv_wr_off:
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t_avdp_w, t_avdh
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we_on, wr_data_mux_bus:
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t_weasu, t_rdyo, t_aavdh, cyc_aavhd_we
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we_off:
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t_wpl, cyc_wpl
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cs_wr_off:
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t_wph
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wr_cycle:
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t_cez_w, t_ce_rdyz
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10. write sync non-muxed
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adv_wr_off: t_avdp_w
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we_on, wr_data_mux_bus: t_weasu, t_rdyo
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we_off: t_wpl, cyc_wpl
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cs_wr_off: t_wph
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wr_cycle: t_cez_w, t_ce_rdyz
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adv_wr_off:
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t_avdp_w
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we_on, wr_data_mux_bus:
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t_weasu, t_rdyo
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we_off:
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t_wpl, cyc_wpl
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cs_wr_off:
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t_wph
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wr_cycle:
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t_cez_w, t_ce_rdyz
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Note: Many of gpmc timings are dependent on other gpmc timings (a few
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gpmc timings purely dependent on other gpmc timings, a reason that
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some of the gpmc timings are missing above), and it will result in
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indirect dependency of peripheral timings to gpmc timings other than
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mentioned above, refer timing routine for more details. To know what
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these peripheral timings correspond to, please see explanations in
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struct gpmc_device_timings definition. And for gpmc timings refer
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IP details (link above).
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Note:
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Many of gpmc timings are dependent on other gpmc timings (a few
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gpmc timings purely dependent on other gpmc timings, a reason that
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some of the gpmc timings are missing above), and it will result in
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indirect dependency of peripheral timings to gpmc timings other than
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mentioned above, refer timing routine for more details. To know what
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these peripheral timings correspond to, please see explanations in
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struct gpmc_device_timings definition. And for gpmc timings refer
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IP details (link above).
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