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i40e: Add FEC for 25g
This patch adds adminq support for Forward Error Correction ("FEC")for 25g products. Change-ID: Iaff4910737c239d2c730e5c22a313ce9c37d3964 Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com> Signed-off-by: Mitch Williams <mitch.a.williams@intel.com> Signed-off-by: Jacek Naczyk <jacek.naczyk@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -1686,6 +1686,8 @@ struct i40e_aq_get_phy_abilities_resp {
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#define I40E_AQ_PHY_LINK_ENABLED 0x08
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#define I40E_AQ_PHY_AN_ENABLED 0x10
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#define I40E_AQ_PHY_FLAG_MODULE_QUAL 0x20
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#define I40E_AQ_PHY_FEC_ABILITY_KR 0x40
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#define I40E_AQ_PHY_FEC_ABILITY_RS 0x80
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__le16 eee_capability;
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#define I40E_AQ_EEE_100BASE_TX 0x0002
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#define I40E_AQ_EEE_1000BASE_T 0x0004
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@ -1701,7 +1703,16 @@ struct i40e_aq_get_phy_abilities_resp {
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#define I40E_AQ_PHY_TYPE_EXT_25G_CR 0X02
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#define I40E_AQ_PHY_TYPE_EXT_25G_SR 0x04
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#define I40E_AQ_PHY_TYPE_EXT_25G_LR 0x08
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u8 mod_type_ext;
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u8 fec_cfg_curr_mod_ext_info;
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#define I40E_AQ_ENABLE_FEC_KR 0x01
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#define I40E_AQ_ENABLE_FEC_RS 0x02
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#define I40E_AQ_REQUEST_FEC_KR 0x04
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#define I40E_AQ_REQUEST_FEC_RS 0x08
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#define I40E_AQ_ENABLE_FEC_AUTO 0x10
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#define I40E_AQ_FEC
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#define I40E_AQ_MODULE_TYPE_EXT_MASK 0xE0
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#define I40E_AQ_MODULE_TYPE_EXT_SHIFT 5
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u8 ext_comp_code;
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u8 phy_id[4];
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u8 module_type[3];
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@ -1729,7 +1740,15 @@ struct i40e_aq_set_phy_config { /* same bits as above in all */
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#define I40E_AQ_PHY_TYPE_EXT_25G_CR 0X02
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#define I40E_AQ_PHY_TYPE_EXT_25G_SR 0x04
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#define I40E_AQ_PHY_TYPE_EXT_25G_LR 0x08
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u8 reserved[2];
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u8 fec_config;
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#define I40E_AQ_SET_FEC_ABILITY_KR BIT(0)
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#define I40E_AQ_SET_FEC_ABILITY_RS BIT(1)
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#define I40E_AQ_SET_FEC_REQUEST_KR BIT(2)
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#define I40E_AQ_SET_FEC_REQUEST_RS BIT(3)
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#define I40E_AQ_SET_FEC_AUTO BIT(4)
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#define I40E_AQ_PHY_FEC_CONFIG_SHIFT 0x0
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#define I40E_AQ_PHY_FEC_CONFIG_MASK (0x1F << I40E_AQ_PHY_FEC_CONFIG_SHIFT)
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u8 reserved;
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};
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I40E_CHECK_CMD_LENGTH(i40e_aq_set_phy_config);
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@ -1819,6 +1838,8 @@ struct i40e_aqc_get_link_status {
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u8 loopback; /* use defines from i40e_aqc_set_lb_mode */
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__le16 max_frame_size;
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u8 config;
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#define I40E_AQ_CONFIG_FEC_KR_ENA 0x01
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#define I40E_AQ_CONFIG_FEC_RS_ENA 0x02
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#define I40E_AQ_CONFIG_CRC_ENA 0x04
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#define I40E_AQ_CONFIG_PACING_MASK 0x78
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u8 external_power_ability;
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@ -1714,6 +1714,8 @@ enum i40e_status_code i40e_set_fc(struct i40e_hw *hw, u8 *aq_failures,
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config.eee_capability = abilities.eee_capability;
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config.eeer = abilities.eeer_val;
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config.low_power_ctrl = abilities.d3_lpan;
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config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
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I40E_AQ_PHY_FEC_CONFIG_MASK;
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status = i40e_aq_set_phy_config(hw, &config, NULL);
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if (status)
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@ -1683,6 +1683,8 @@ struct i40e_aq_get_phy_abilities_resp {
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#define I40E_AQ_PHY_LINK_ENABLED 0x08
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#define I40E_AQ_PHY_AN_ENABLED 0x10
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#define I40E_AQ_PHY_FLAG_MODULE_QUAL 0x20
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#define I40E_AQ_PHY_FEC_ABILITY_KR 0x40
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#define I40E_AQ_PHY_FEC_ABILITY_RS 0x80
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__le16 eee_capability;
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#define I40E_AQ_EEE_100BASE_TX 0x0002
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#define I40E_AQ_EEE_1000BASE_T 0x0004
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@ -1698,7 +1700,16 @@ struct i40e_aq_get_phy_abilities_resp {
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#define I40E_AQ_PHY_TYPE_EXT_25G_CR 0X02
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#define I40E_AQ_PHY_TYPE_EXT_25G_SR 0x04
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#define I40E_AQ_PHY_TYPE_EXT_25G_LR 0x08
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u8 mod_type_ext;
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u8 fec_cfg_curr_mod_ext_info;
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#define I40E_AQ_ENABLE_FEC_KR 0x01
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#define I40E_AQ_ENABLE_FEC_RS 0x02
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#define I40E_AQ_REQUEST_FEC_KR 0x04
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#define I40E_AQ_REQUEST_FEC_RS 0x08
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#define I40E_AQ_ENABLE_FEC_AUTO 0x10
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#define I40E_AQ_FEC
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#define I40E_AQ_MODULE_TYPE_EXT_MASK 0xE0
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#define I40E_AQ_MODULE_TYPE_EXT_SHIFT 5
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u8 ext_comp_code;
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u8 phy_id[4];
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u8 module_type[3];
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@ -1726,7 +1737,15 @@ struct i40e_aq_set_phy_config { /* same bits as above in all */
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#define I40E_AQ_PHY_TYPE_EXT_25G_CR 0X02
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#define I40E_AQ_PHY_TYPE_EXT_25G_SR 0x04
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#define I40E_AQ_PHY_TYPE_EXT_25G_LR 0x08
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u8 reserved[2];
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u8 fec_config;
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#define I40E_AQ_SET_FEC_ABILITY_KR BIT(0)
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#define I40E_AQ_SET_FEC_ABILITY_RS BIT(1)
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#define I40E_AQ_SET_FEC_REQUEST_KR BIT(2)
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#define I40E_AQ_SET_FEC_REQUEST_RS BIT(3)
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#define I40E_AQ_SET_FEC_AUTO BIT(4)
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#define I40E_AQ_PHY_FEC_CONFIG_SHIFT 0x0
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#define I40E_AQ_PHY_FEC_CONFIG_MASK (0x1F << I40E_AQ_PHY_FEC_CONFIG_SHIFT)
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u8 reserved;
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};
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I40E_CHECK_CMD_LENGTH(i40e_aq_set_phy_config);
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@ -1816,6 +1835,8 @@ struct i40e_aqc_get_link_status {
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u8 loopback; /* use defines from i40e_aqc_set_lb_mode */
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__le16 max_frame_size;
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u8 config;
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#define I40E_AQ_CONFIG_FEC_KR_ENA 0x01
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#define I40E_AQ_CONFIG_FEC_RS_ENA 0x02
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#define I40E_AQ_CONFIG_CRC_ENA 0x04
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#define I40E_AQ_CONFIG_PACING_MASK 0x78
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u8 external_power_ability;
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