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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 13:50:53 +07:00
i2c: at91: add dma support
Add dma support for Atmel TWI which is available on sam9x5 and later. When using dma for reception, you have to read only n-2 bytes. The last two bytes are read manually. Don't doing this should cause to send the STOP command too late and then to get extra data in the receive register. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
This commit is contained in:
Ludovic Desroches
Wolfram Sang
parent
5f433819b3
commit
60937b2cdb
@ -19,6 +19,8 @@
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#include <linux/clk.h>
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#include <linux/completion.h>
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#include <linux/dma-mapping.h>
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#include <linux/dmaengine.h>
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#include <linux/err.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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@ -29,9 +31,11 @@
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#include <linux/of_i2c.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/platform_data/dma-atmel.h>
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#define TWI_CLK_HZ 100000 /* max 400 Kbits/s */
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#define AT91_I2C_TIMEOUT msecs_to_jiffies(100) /* transfer timeout */
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#define AT91_I2C_DMA_THRESHOLD 8 /* enable DMA if transfer size is bigger than this threshold */
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/* AT91 TWI register definitions */
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#define AT91_TWI_CR 0x0000 /* Control Register */
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@ -69,6 +73,18 @@ struct at91_twi_pdata {
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unsigned clk_max_div;
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unsigned clk_offset;
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bool has_unre_flag;
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bool has_dma_support;
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struct at_dma_slave dma_slave;
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};
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struct at91_twi_dma {
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struct dma_chan *chan_rx;
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struct dma_chan *chan_tx;
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struct scatterlist sg;
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struct dma_async_tx_descriptor *data_desc;
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enum dma_data_direction direction;
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bool buf_mapped;
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bool xfer_in_progress;
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};
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struct at91_twi_dev {
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@ -80,10 +96,13 @@ struct at91_twi_dev {
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size_t buf_len;
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struct i2c_msg *msg;
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int irq;
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unsigned imr;
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unsigned transfer_status;
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struct i2c_adapter adapter;
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unsigned twi_cwgr_reg;
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struct at91_twi_pdata *pdata;
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bool use_dma;
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struct at91_twi_dma dma;
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};
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static unsigned at91_twi_read(struct at91_twi_dev *dev, unsigned reg)
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@ -102,6 +121,17 @@ static void at91_disable_twi_interrupts(struct at91_twi_dev *dev)
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AT91_TWI_TXCOMP | AT91_TWI_RXRDY | AT91_TWI_TXRDY);
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}
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static void at91_twi_irq_save(struct at91_twi_dev *dev)
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{
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dev->imr = at91_twi_read(dev, AT91_TWI_IMR) & 0x7;
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at91_disable_twi_interrupts(dev);
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}
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static void at91_twi_irq_restore(struct at91_twi_dev *dev)
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{
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at91_twi_write(dev, AT91_TWI_IER, dev->imr);
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}
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static void at91_init_twi_bus(struct at91_twi_dev *dev)
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{
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at91_disable_twi_interrupts(dev);
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@ -138,6 +168,28 @@ static void __devinit at91_calc_twi_clock(struct at91_twi_dev *dev, int twi_clk)
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dev_dbg(dev->dev, "cdiv %d ckdiv %d\n", cdiv, ckdiv);
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}
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static void at91_twi_dma_cleanup(struct at91_twi_dev *dev)
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{
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struct at91_twi_dma *dma = &dev->dma;
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at91_twi_irq_save(dev);
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if (dma->xfer_in_progress) {
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if (dma->direction == DMA_FROM_DEVICE)
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dmaengine_terminate_all(dma->chan_rx);
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else
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dmaengine_terminate_all(dma->chan_tx);
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dma->xfer_in_progress = false;
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}
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if (dma->buf_mapped) {
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dma_unmap_single(dev->dev, sg_dma_address(&dma->sg),
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dev->buf_len, dma->direction);
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dma->buf_mapped = false;
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}
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at91_twi_irq_restore(dev);
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}
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static void at91_twi_write_next_byte(struct at91_twi_dev *dev)
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{
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if (dev->buf_len <= 0)
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@ -154,6 +206,60 @@ static void at91_twi_write_next_byte(struct at91_twi_dev *dev)
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++dev->buf;
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}
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static void at91_twi_write_data_dma_callback(void *data)
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{
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struct at91_twi_dev *dev = (struct at91_twi_dev *)data;
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dma_unmap_single(dev->dev, sg_dma_address(&dev->dma.sg),
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dev->buf_len, DMA_MEM_TO_DEV);
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at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP);
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}
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static void at91_twi_write_data_dma(struct at91_twi_dev *dev)
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{
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dma_addr_t dma_addr;
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struct dma_async_tx_descriptor *txdesc;
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struct at91_twi_dma *dma = &dev->dma;
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struct dma_chan *chan_tx = dma->chan_tx;
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if (dev->buf_len <= 0)
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return;
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dma->direction = DMA_TO_DEVICE;
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at91_twi_irq_save(dev);
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dma_addr = dma_map_single(dev->dev, dev->buf, dev->buf_len,
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DMA_TO_DEVICE);
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if (dma_mapping_error(dev->dev, dma_addr)) {
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dev_err(dev->dev, "dma map failed\n");
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return;
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}
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dma->buf_mapped = true;
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at91_twi_irq_restore(dev);
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sg_dma_len(&dma->sg) = dev->buf_len;
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sg_dma_address(&dma->sg) = dma_addr;
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txdesc = dmaengine_prep_slave_sg(chan_tx, &dma->sg, 1, DMA_MEM_TO_DEV,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!txdesc) {
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dev_err(dev->dev, "dma prep slave sg failed\n");
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goto error;
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}
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txdesc->callback = at91_twi_write_data_dma_callback;
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txdesc->callback_param = dev;
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dma->xfer_in_progress = true;
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dmaengine_submit(txdesc);
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dma_async_issue_pending(chan_tx);
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return;
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error:
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at91_twi_dma_cleanup(dev);
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}
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static void at91_twi_read_next_byte(struct at91_twi_dev *dev)
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{
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if (dev->buf_len <= 0)
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@ -179,6 +285,61 @@ static void at91_twi_read_next_byte(struct at91_twi_dev *dev)
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++dev->buf;
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}
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static void at91_twi_read_data_dma_callback(void *data)
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{
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struct at91_twi_dev *dev = (struct at91_twi_dev *)data;
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dma_unmap_single(dev->dev, sg_dma_address(&dev->dma.sg),
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dev->buf_len, DMA_DEV_TO_MEM);
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/* The last two bytes have to be read without using dma */
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dev->buf += dev->buf_len - 2;
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dev->buf_len = 2;
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at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_RXRDY);
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}
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static void at91_twi_read_data_dma(struct at91_twi_dev *dev)
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{
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dma_addr_t dma_addr;
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struct dma_async_tx_descriptor *rxdesc;
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struct at91_twi_dma *dma = &dev->dma;
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struct dma_chan *chan_rx = dma->chan_rx;
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dma->direction = DMA_FROM_DEVICE;
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/* Keep in mind that we won't use dma to read the last two bytes */
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at91_twi_irq_save(dev);
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dma_addr = dma_map_single(dev->dev, dev->buf, dev->buf_len - 2,
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DMA_FROM_DEVICE);
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if (dma_mapping_error(dev->dev, dma_addr)) {
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dev_err(dev->dev, "dma map failed\n");
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return;
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}
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dma->buf_mapped = true;
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at91_twi_irq_restore(dev);
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dma->sg.dma_address = dma_addr;
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sg_dma_len(&dma->sg) = dev->buf_len - 2;
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rxdesc = dmaengine_prep_slave_sg(chan_rx, &dma->sg, 1, DMA_DEV_TO_MEM,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!rxdesc) {
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dev_err(dev->dev, "dma prep slave sg failed\n");
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goto error;
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}
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rxdesc->callback = at91_twi_read_data_dma_callback;
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rxdesc->callback_param = dev;
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dma->xfer_in_progress = true;
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dmaengine_submit(rxdesc);
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dma_async_issue_pending(dma->chan_rx);
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return;
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error:
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at91_twi_dma_cleanup(dev);
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}
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static irqreturn_t atmel_twi_interrupt(int irq, void *dev_id)
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{
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struct at91_twi_dev *dev = dev_id;
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@ -229,12 +390,36 @@ static int at91_do_twi_transfer(struct at91_twi_dev *dev)
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if (dev->buf_len <= 1 && !(dev->msg->flags & I2C_M_RECV_LEN))
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start_flags |= AT91_TWI_STOP;
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at91_twi_write(dev, AT91_TWI_CR, start_flags);
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at91_twi_write(dev, AT91_TWI_IER,
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/*
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* When using dma, the last byte has to be read manually in
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* order to not send the stop command too late and then
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* to receive extra data. In practice, there are some issues
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* if you use the dma to read n-1 bytes because of latency.
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* Reading n-2 bytes with dma and the two last ones manually
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* seems to be the best solution.
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*/
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if (dev->use_dma && (dev->buf_len > AT91_I2C_DMA_THRESHOLD)) {
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at91_twi_read_data_dma(dev);
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/*
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* It is important to enable TXCOMP irq here because
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* doing it only when transferring the last two bytes
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* will mask NACK errors since TXCOMP is set when a
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* NACK occurs.
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*/
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at91_twi_write(dev, AT91_TWI_IER,
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AT91_TWI_TXCOMP);
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} else
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at91_twi_write(dev, AT91_TWI_IER,
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AT91_TWI_TXCOMP | AT91_TWI_RXRDY);
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} else {
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at91_twi_write_next_byte(dev);
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at91_twi_write(dev, AT91_TWI_IER,
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AT91_TWI_TXCOMP | AT91_TWI_TXRDY);
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if (dev->use_dma && (dev->buf_len > AT91_I2C_DMA_THRESHOLD)) {
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at91_twi_write_data_dma(dev);
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at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_TXCOMP);
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} else {
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at91_twi_write_next_byte(dev);
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at91_twi_write(dev, AT91_TWI_IER,
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AT91_TWI_TXCOMP | AT91_TWI_TXRDY);
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}
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}
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ret = wait_for_completion_interruptible_timeout(&dev->cmd_complete,
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@ -242,23 +427,31 @@ static int at91_do_twi_transfer(struct at91_twi_dev *dev)
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if (ret == 0) {
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dev_err(dev->dev, "controller timed out\n");
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at91_init_twi_bus(dev);
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return -ETIMEDOUT;
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ret = -ETIMEDOUT;
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goto error;
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}
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if (dev->transfer_status & AT91_TWI_NACK) {
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dev_dbg(dev->dev, "received nack\n");
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return -EREMOTEIO;
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ret = -EREMOTEIO;
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goto error;
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}
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if (dev->transfer_status & AT91_TWI_OVRE) {
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dev_err(dev->dev, "overrun while reading\n");
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return -EIO;
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ret = -EIO;
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goto error;
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}
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if (has_unre_flag && dev->transfer_status & AT91_TWI_UNRE) {
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dev_err(dev->dev, "underrun while writing\n");
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return -EIO;
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ret = -EIO;
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goto error;
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}
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dev_dbg(dev->dev, "transfer complete\n");
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return 0;
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error:
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at91_twi_dma_cleanup(dev);
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return ret;
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}
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static int at91_twi_xfer(struct i2c_adapter *adap, struct i2c_msg *msg, int num)
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@ -329,36 +522,42 @@ static struct at91_twi_pdata at91rm9200_config = {
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.clk_max_div = 5,
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.clk_offset = 3,
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.has_unre_flag = true,
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.has_dma_support = false,
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};
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static struct at91_twi_pdata at91sam9261_config = {
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.clk_max_div = 5,
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.clk_offset = 4,
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.has_unre_flag = false,
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.has_dma_support = false,
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};
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static struct at91_twi_pdata at91sam9260_config = {
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.clk_max_div = 7,
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.clk_offset = 4,
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.has_unre_flag = false,
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.has_dma_support = false,
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};
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static struct at91_twi_pdata at91sam9g20_config = {
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.clk_max_div = 7,
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.clk_offset = 4,
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.has_unre_flag = false,
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.has_dma_support = false,
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};
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static struct at91_twi_pdata at91sam9g10_config = {
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.clk_max_div = 7,
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.clk_offset = 4,
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.has_unre_flag = false,
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.has_dma_support = false,
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};
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static struct at91_twi_pdata at91sam9x5_config = {
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.clk_max_div = 7,
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.clk_offset = 4,
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.has_unre_flag = false,
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.has_dma_support = true,
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};
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static const struct platform_device_id at91_twi_devtypes[] = {
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@ -405,6 +604,90 @@ MODULE_DEVICE_TABLE(of, atmel_twi_dt_ids);
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#define atmel_twi_dt_ids NULL
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#endif
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static bool __devinit filter(struct dma_chan *chan, void *slave)
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{
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struct at_dma_slave *sl = slave;
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if (sl->dma_dev == chan->device->dev) {
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chan->private = sl;
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return true;
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} else {
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return false;
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}
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}
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static int __devinit at91_twi_configure_dma(struct at91_twi_dev *dev, u32 phy_addr)
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{
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int ret = 0;
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struct at_dma_slave *sdata;
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struct dma_slave_config slave_config;
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struct at91_twi_dma *dma = &dev->dma;
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sdata = &dev->pdata->dma_slave;
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memset(&slave_config, 0, sizeof(slave_config));
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slave_config.src_addr = (dma_addr_t)phy_addr + AT91_TWI_RHR;
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slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
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slave_config.src_maxburst = 1;
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slave_config.dst_addr = (dma_addr_t)phy_addr + AT91_TWI_THR;
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slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
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slave_config.dst_maxburst = 1;
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slave_config.device_fc = false;
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if (sdata && sdata->dma_dev) {
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dma_cap_mask_t mask;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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dma->chan_tx = dma_request_channel(mask, filter, sdata);
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if (!dma->chan_tx) {
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dev_err(dev->dev, "no DMA channel available for tx\n");
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ret = -EBUSY;
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goto error;
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}
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dma->chan_rx = dma_request_channel(mask, filter, sdata);
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if (!dma->chan_rx) {
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dev_err(dev->dev, "no DMA channel available for rx\n");
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ret = -EBUSY;
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goto error;
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}
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} else {
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ret = -EINVAL;
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goto error;
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}
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slave_config.direction = DMA_MEM_TO_DEV;
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if (dmaengine_slave_config(dma->chan_tx, &slave_config)) {
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dev_err(dev->dev, "failed to configure tx channel\n");
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ret = -EINVAL;
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goto error;
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}
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slave_config.direction = DMA_DEV_TO_MEM;
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if (dmaengine_slave_config(dma->chan_rx, &slave_config)) {
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dev_err(dev->dev, "failed to configure rx channel\n");
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ret = -EINVAL;
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goto error;
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}
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sg_init_table(&dma->sg, 1);
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dma->buf_mapped = false;
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dma->xfer_in_progress = false;
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dev_info(dev->dev, "using %s (tx) and %s (rx) for DMA transfers\n",
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dma_chan_name(dma->chan_tx), dma_chan_name(dma->chan_rx));
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return ret;
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error:
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dev_info(dev->dev, "can't use DMA\n");
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if (dma->chan_rx)
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dma_release_channel(dma->chan_rx);
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if (dma->chan_tx)
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dma_release_channel(dma->chan_tx);
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return ret;
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}
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|
||||
static struct at91_twi_pdata * __devinit at91_twi_get_driver_data(
|
||||
struct platform_device *pdev)
|
||||
{
|
||||
@ -423,6 +706,7 @@ static int __devinit at91_twi_probe(struct platform_device *pdev)
|
||||
struct at91_twi_dev *dev;
|
||||
struct resource *mem;
|
||||
int rc;
|
||||
u32 phy_addr;
|
||||
|
||||
dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
|
||||
if (!dev)
|
||||
@ -433,6 +717,7 @@ static int __devinit at91_twi_probe(struct platform_device *pdev)
|
||||
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!mem)
|
||||
return -ENODEV;
|
||||
phy_addr = mem->start;
|
||||
|
||||
dev->pdata = at91_twi_get_driver_data(pdev);
|
||||
if (!dev->pdata)
|
||||
@ -462,6 +747,11 @@ static int __devinit at91_twi_probe(struct platform_device *pdev)
|
||||
}
|
||||
clk_prepare_enable(dev->clk);
|
||||
|
||||
if (dev->pdata->has_dma_support) {
|
||||
if (at91_twi_configure_dma(dev, phy_addr) == 0)
|
||||
dev->use_dma = true;
|
||||
}
|
||||
|
||||
at91_calc_twi_clock(dev, TWI_CLK_HZ);
|
||||
at91_init_twi_bus(dev);
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user