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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ARM: 6266/1: ux500: add separate irq lists for DB8500 and DB5500
Acked-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Rabin Vincent
Russell King
parent
6d9fb90032
commit
6055930cba
@ -78,7 +78,7 @@ static struct spi_board_info u8500_spi_devices[] = {
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.bus_num = 0,
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.chip_select = 0,
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.mode = SPI_MODE_0,
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.irq = IRQ_AB4500,
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.irq = IRQ_DB8500_AB8500,
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},
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};
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@ -65,7 +65,7 @@ struct amba_device u8500_ssp0_device = {
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.end = U8500_SSP0_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = {IRQ_SSP0, NO_IRQ },
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.irq = {IRQ_DB8500_SSP0, NO_IRQ },
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/* ST-Ericsson modified id */
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.periphid = SSP_PER_ID,
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};
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@ -77,8 +77,8 @@ static struct resource u8500_i2c0_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_I2C0,
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.end = IRQ_I2C0,
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.start = IRQ_DB8500_I2C0,
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.end = IRQ_DB8500_I2C0,
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.flags = IORESOURCE_IRQ,
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}
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};
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@ -97,8 +97,8 @@ static struct resource u8500_i2c4_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_I2C4,
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.end = IRQ_I2C4,
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.start = IRQ_DB8500_I2C4,
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.end = IRQ_DB8500_I2C4,
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.flags = IORESOURCE_IRQ,
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}
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};
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@ -130,8 +130,8 @@ static struct resource dma40_resources[] = {
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.name = "lcla",
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},
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[3] = {
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.start = IRQ_DMA,
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.end = IRQ_DMA,
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.start = IRQ_DB8500_DMA,
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.end = IRQ_DB8500_DMA,
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.flags = IORESOURCE_IRQ}
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};
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85
arch/arm/mach-ux500/include/mach/irqs-db5500.h
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85
arch/arm/mach-ux500/include/mach/irqs-db5500.h
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@ -0,0 +1,85 @@
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/*
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* Copyright (C) ST-Ericsson SA 2010
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*
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* Author: Rabin Vincent <rabin.vincent@stericsson.com>
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* License terms: GNU General Public License (GPL) version 2
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*/
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#ifndef __MACH_IRQS_DB5500_H
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#define __MACH_IRQS_DB5500_H
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#define IRQ_DB5500_MTU0 (IRQ_SHPI_START + 4)
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#define IRQ_DB5500_SPI2 (IRQ_SHPI_START + 6)
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#define IRQ_DB5500_PMU0 (IRQ_SHPI_START + 7)
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#define IRQ_DB5500_SPI0 (IRQ_SHPI_START + 8)
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#define IRQ_DB5500_RTT (IRQ_SHPI_START + 9)
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#define IRQ_DB5500_PKA (IRQ_SHPI_START + 10)
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#define IRQ_DB5500_UART0 (IRQ_SHPI_START + 11)
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#define IRQ_DB5500_I2C3 (IRQ_SHPI_START + 12)
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#define IRQ_DB5500_L2CC (IRQ_SHPI_START + 13)
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#define IRQ_DB5500_MSP0 (IRQ_SHPI_START + 14)
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#define IRQ_DB5500_CRYP1 (IRQ_SHPI_START + 15)
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#define IRQ_DB5500_PMU1 (IRQ_SHPI_START + 16)
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#define IRQ_DB5500_MTU1 (IRQ_SHPI_START + 17)
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#define IRQ_DB5500_RTC (IRQ_SHPI_START + 18)
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#define IRQ_DB5500_UART1 (IRQ_SHPI_START + 19)
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#define IRQ_DB5500_USB_WAKEUP (IRQ_SHPI_START + 20)
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#define IRQ_DB5500_I2C0 (IRQ_SHPI_START + 21)
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#define IRQ_DB5500_I2C1 (IRQ_SHPI_START + 22)
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#define IRQ_DB5500_USBOTG (IRQ_SHPI_START + 23)
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#define IRQ_DB5500_DMA_SECURE (IRQ_SHPI_START + 24)
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#define IRQ_DB5500_DMA (IRQ_SHPI_START + 25)
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#define IRQ_DB5500_UART2 (IRQ_SHPI_START + 26)
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#define IRQ_DB5500_ICN_PMU1 (IRQ_SHPI_START + 27)
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#define IRQ_DB5500_ICN_PMU2 (IRQ_SHPI_START + 28)
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#define IRQ_DB5500_UART3 (IRQ_SHPI_START + 29)
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#define IRQ_DB5500_SPI3 (IRQ_SHPI_START + 30)
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#define IRQ_DB5500_SDMMC4 (IRQ_SHPI_START + 31)
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#define IRQ_DB5500_IRRC (IRQ_SHPI_START + 33)
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#define IRQ_DB5500_IRDA_FT (IRQ_SHPI_START + 34)
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#define IRQ_DB5500_IRDA_SD (IRQ_SHPI_START + 35)
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#define IRQ_DB5500_IRDA_FI (IRQ_SHPI_START + 36)
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#define IRQ_DB5500_IRDA_FD (IRQ_SHPI_START + 37)
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#define IRQ_DB5500_FSMC_CODEREADY (IRQ_SHPI_START + 38)
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#define IRQ_DB5500_FSMC_NANDWAIT (IRQ_SHPI_START + 39)
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#define IRQ_DB5500_AB5500 (IRQ_SHPI_START + 40)
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#define IRQ_DB5500_SDMMC2 (IRQ_SHPI_START + 41)
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#define IRQ_DB5500_SIA (IRQ_SHPI_START + 42)
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#define IRQ_DB5500_SIA2 (IRQ_SHPI_START + 43)
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#define IRQ_DB5500_HVA (IRQ_SHPI_START + 44)
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#define IRQ_DB5500_HVA2 (IRQ_SHPI_START + 45)
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#define IRQ_DB5500_PRCMU0 (IRQ_SHPI_START + 46)
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#define IRQ_DB5500_PRCMU1 (IRQ_SHPI_START + 47)
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#define IRQ_DB5500_DISP (IRQ_SHPI_START + 48)
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#define IRQ_DB5500_SDMMC1 (IRQ_SHPI_START + 50)
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#define IRQ_DB5500_MSP1 (IRQ_SHPI_START + 52)
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#define IRQ_DB5500_KBD (IRQ_SHPI_START + 53)
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#define IRQ_DB5500_I2C2 (IRQ_SHPI_START + 55)
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#define IRQ_DB5500_B2R2 (IRQ_SHPI_START + 56)
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#define IRQ_DB5500_CRYP0 (IRQ_SHPI_START + 57)
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#define IRQ_DB5500_SDMMC3 (IRQ_SHPI_START + 59)
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#define IRQ_DB5500_SDMMC0 (IRQ_SHPI_START + 60)
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#define IRQ_DB5500_HSEM (IRQ_SHPI_START + 61)
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#define IRQ_DB5500_SBAG (IRQ_SHPI_START + 63)
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#define IRQ_DB5500_SPI1 (IRQ_SHPI_START + 96)
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#define IRQ_DB5500_MSP2 (IRQ_SHPI_START + 98)
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#define IRQ_DB5500_SRPTIMER (IRQ_SHPI_START + 101)
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#define IRQ_DB5500_CTI0 (IRQ_SHPI_START + 108)
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#define IRQ_DB5500_CTI1 (IRQ_SHPI_START + 109)
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#define IRQ_DB5500_ICN_ERR (IRQ_SHPI_START + 110)
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#define IRQ_DB5500_MALI_PPMMU (IRQ_SHPI_START + 112)
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#define IRQ_DB5500_MALI_PP (IRQ_SHPI_START + 113)
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#define IRQ_DB5500_MALI_GPMMU (IRQ_SHPI_START + 114)
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#define IRQ_DB5500_MALI_GP (IRQ_SHPI_START + 115)
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#define IRQ_DB5500_MALI (IRQ_SHPI_START + 116)
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#define IRQ_DB5500_PRCMU_SEM (IRQ_SHPI_START + 118)
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#define IRQ_DB5500_GPIO0 (IRQ_SHPI_START + 119)
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#define IRQ_DB5500_GPIO1 (IRQ_SHPI_START + 120)
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#define IRQ_DB5500_GPIO2 (IRQ_SHPI_START + 121)
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#define IRQ_DB5500_GPIO3 (IRQ_SHPI_START + 122)
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#define IRQ_DB5500_GPIO4 (IRQ_SHPI_START + 123)
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#define IRQ_DB5500_GPIO5 (IRQ_SHPI_START + 124)
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#define IRQ_DB5500_GPIO6 (IRQ_SHPI_START + 125)
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#define IRQ_DB5500_GPIO7 (IRQ_SHPI_START + 126)
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#endif
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96
arch/arm/mach-ux500/include/mach/irqs-db8500.h
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96
arch/arm/mach-ux500/include/mach/irqs-db8500.h
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@ -0,0 +1,96 @@
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/*
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* Copyright (C) ST-Ericsson SA 2010
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*
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* Author: Rabin Vincent <rabin.vincent@stericsson.com>
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* License terms: GNU General Public License (GPL) version 2
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*/
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#ifndef __MACH_IRQS_DB8500_H
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#define __MACH_IRQS_DB8500_H
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#define IRQ_DB8500_MTU0 (IRQ_SHPI_START + 4)
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#define IRQ_DB8500_SPI2 (IRQ_SHPI_START + 6)
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#define IRQ_DB8500_PMU (IRQ_SHPI_START + 7)
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#define IRQ_DB8500_SPI0 (IRQ_SHPI_START + 8)
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#define IRQ_DB8500_RTT (IRQ_SHPI_START + 9)
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#define IRQ_DB8500_PKA (IRQ_SHPI_START + 10)
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#define IRQ_DB8500_UART0 (IRQ_SHPI_START + 11)
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#define IRQ_DB8500_I2C3 (IRQ_SHPI_START + 12)
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#define IRQ_DB8500_L2CC (IRQ_SHPI_START + 13)
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#define IRQ_DB8500_SSP0 (IRQ_SHPI_START + 14)
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#define IRQ_DB8500_CRYP1 (IRQ_SHPI_START + 15)
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#define IRQ_DB8500_MSP1_RX (IRQ_SHPI_START + 16)
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#define IRQ_DB8500_MTU1 (IRQ_SHPI_START + 17)
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#define IRQ_DB8500_RTC (IRQ_SHPI_START + 18)
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#define IRQ_DB8500_UART1 (IRQ_SHPI_START + 19)
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#define IRQ_DB8500_USB_WAKEUP (IRQ_SHPI_START + 20)
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#define IRQ_DB8500_I2C0 (IRQ_SHPI_START + 21)
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#define IRQ_DB8500_I2C1 (IRQ_SHPI_START + 22)
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#define IRQ_DB8500_USBOTG (IRQ_SHPI_START + 23)
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#define IRQ_DB8500_DMA_SECURE (IRQ_SHPI_START + 24)
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#define IRQ_DB8500_DMA (IRQ_SHPI_START + 25)
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#define IRQ_DB8500_UART2 (IRQ_SHPI_START + 26)
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#define IRQ_DB8500_ICN_PMU1 (IRQ_SHPI_START + 27)
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#define IRQ_DB8500_ICN_PMU2 (IRQ_SHPI_START + 28)
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#define IRQ_DB8500_HSIR_EXCEP (IRQ_SHPI_START + 29)
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#define IRQ_DB8500_MSP0 (IRQ_SHPI_START + 31)
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#define IRQ_DB8500_HSIR_CH0_OVRRUN (IRQ_SHPI_START + 32)
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#define IRQ_DB8500_HSIR_CH1_OVRRUN (IRQ_SHPI_START + 33)
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#define IRQ_DB8500_HSIR_CH2_OVRRUN (IRQ_SHPI_START + 34)
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#define IRQ_DB8500_HSIR_CH3_OVRRUN (IRQ_SHPI_START + 35)
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#define IRQ_DB8500_HSIR_CH4_OVRRUN (IRQ_SHPI_START + 36)
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#define IRQ_DB8500_HSIR_CH5_OVRRUN (IRQ_SHPI_START + 37)
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#define IRQ_DB8500_HSIR_CH6_OVRRUN (IRQ_SHPI_START + 38)
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#define IRQ_DB8500_HSIR_CH7_OVRRUN (IRQ_SHPI_START + 39)
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#define IRQ_DB8500_AB8500 (IRQ_SHPI_START + 40)
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#define IRQ_DB8500_SDMMC2 (IRQ_SHPI_START + 41)
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#define IRQ_DB8500_SIA (IRQ_SHPI_START + 42)
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#define IRQ_DB8500_SIA2 (IRQ_SHPI_START + 43)
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#define IRQ_DB8500_SVA (IRQ_SHPI_START + 44)
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#define IRQ_DB8500_SVA2 (IRQ_SHPI_START + 45)
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#define IRQ_DB8500_PRCMU0 (IRQ_SHPI_START + 46)
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#define IRQ_DB8500_PRCMU1 (IRQ_SHPI_START + 47)
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#define IRQ_DB8500_DISP (IRQ_SHPI_START + 48)
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#define IRQ_DB8500_SPI3 (IRQ_SHPI_START + 49)
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#define IRQ_DB8500_SDMMC1 (IRQ_SHPI_START + 50)
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#define IRQ_DB8500_I2C4 (IRQ_SHPI_START + 51)
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#define IRQ_DB8500_SSP1 (IRQ_SHPI_START + 52)
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#define IRQ_DB8500_SKE (IRQ_SHPI_START + 53)
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#define IRQ_DB8500_KB (IRQ_SHPI_START + 54)
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#define IRQ_DB8500_I2C2 (IRQ_SHPI_START + 55)
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#define IRQ_DB8500_B2R2 (IRQ_SHPI_START + 56)
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#define IRQ_DB8500_CRYP0 (IRQ_SHPI_START + 57)
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#define IRQ_DB8500_SDMMC3 (IRQ_SHPI_START + 59)
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#define IRQ_DB8500_SDMMC0 (IRQ_SHPI_START + 60)
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#define IRQ_DB8500_HSEM (IRQ_SHPI_START + 61)
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#define IRQ_DB8500_MSP1 (IRQ_SHPI_START + 62)
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#define IRQ_DB8500_SBAG (IRQ_SHPI_START + 63)
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#define IRQ_DB8500_SPI1 (IRQ_SHPI_START + 96)
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#define IRQ_DB8500_SRPTIMER (IRQ_SHPI_START + 97)
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#define IRQ_DB8500_MSP2 (IRQ_SHPI_START + 98)
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#define IRQ_DB8500_SDMMC4 (IRQ_SHPI_START + 99)
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#define IRQ_DB8500_SDMMC5 (IRQ_SHPI_START + 100)
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#define IRQ_DB8500_HSIRD0 (IRQ_SHPI_START + 104)
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#define IRQ_DB8500_HSIRD1 (IRQ_SHPI_START + 105)
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#define IRQ_DB8500_HSITD0 (IRQ_SHPI_START + 106)
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#define IRQ_DB8500_HSITD1 (IRQ_SHPI_START + 107)
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#define IRQ_DB8500_CTI0 (IRQ_SHPI_START + 108)
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#define IRQ_DB8500_CTI1 (IRQ_SHPI_START + 109)
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#define IRQ_DB8500_ICN_ERR (IRQ_SHPI_START + 110)
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#define IRQ_DB8500_MALI_PPMMU (IRQ_SHPI_START + 112)
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#define IRQ_DB8500_MALI_PP (IRQ_SHPI_START + 113)
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#define IRQ_DB8500_MALI_GPMMU (IRQ_SHPI_START + 114)
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#define IRQ_DB8500_MALI_GP (IRQ_SHPI_START + 115)
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#define IRQ_DB8500_MALI (IRQ_SHPI_START + 116)
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#define IRQ_DB8500_PRCMU_SEM (IRQ_SHPI_START + 118)
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#define IRQ_DB8500_GPIO0 (IRQ_SHPI_START + 119)
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#define IRQ_DB8500_GPIO1 (IRQ_SHPI_START + 120)
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#define IRQ_DB8500_GPIO2 (IRQ_SHPI_START + 121)
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#define IRQ_DB8500_GPIO3 (IRQ_SHPI_START + 122)
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#define IRQ_DB8500_GPIO4 (IRQ_SHPI_START + 123)
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#define IRQ_DB8500_GPIO5 (IRQ_SHPI_START + 124)
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#define IRQ_DB8500_GPIO6 (IRQ_SHPI_START + 125)
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#define IRQ_DB8500_GPIO7 (IRQ_SHPI_START + 126)
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#define IRQ_DB8500_GPIO8 (IRQ_SHPI_START + 127)
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#endif
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@ -10,7 +10,8 @@
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#ifndef ASM_ARCH_IRQS_H
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#define ASM_ARCH_IRQS_H
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#include <mach/hardware.h>
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#include <mach/irqs-db5500.h>
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#include <mach/irqs-db8500.h>
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#define IRQ_LOCALTIMER 29
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#define IRQ_LOCALWDOG 30
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@ -67,12 +68,17 @@
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/* There are 128 shared peripheral interrupts assigned to
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* INTID[160:32]. The first 32 interrupts are reserved.
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*/
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#define U8500_SOC_NR_IRQS 161
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#define DBX500_NR_INTERNAL_IRQS 161
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/* After chip-specific IRQ numbers we have the GPIO ones */
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#define NOMADIK_NR_GPIO 288
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#define NOMADIK_GPIO_TO_IRQ(gpio) ((gpio) + U8500_SOC_NR_IRQS)
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#define NOMADIK_IRQ_TO_GPIO(irq) ((irq) - U8500_SOC_NR_IRQS)
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#define NR_IRQS NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO)
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#define NOMADIK_GPIO_TO_IRQ(gpio) ((gpio) + DBX500_NR_INTERNAL_IRQS)
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#define NOMADIK_IRQ_TO_GPIO(irq) ((irq) - DBX500_NR_INTERNAL_IRQS)
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#define IRQ_BOARD_START NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO)
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#endif /*ASM_ARCH_IRQS_H*/
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/* This will be overridden by board-specific irq headers */
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#define IRQ_BOARD_END IRQ_BOARD_START
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#define NR_IRQS IRQ_BOARD_END
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#endif /* ASM_ARCH_IRQS_H */
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