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[PATCH] powermac: Fix i2c on keywest based chips
The new i2c implementation for PowerMac has a regression that causes the hardware to go out of state when probing non-existent devices. While fixing that, I also found & fixed a couple of other corner cases. This fixes booting with a pbbuttons version that scans the i2c bus for an LMU controller among others. Tested on a dual G5 with thermal control (which has heavy i2c activity) with no problem so far. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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@ -231,6 +231,14 @@ static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
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return isr;
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}
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static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result)
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{
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kw_write_reg(reg_control, KW_I2C_CTL_STOP);
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host->state = state_stop;
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host->result = result;
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}
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static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
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{
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u8 ack;
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@ -246,42 +254,36 @@ static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
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}
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if (isr == 0) {
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printk(KERN_WARNING "low_i2c: Timeout in i2c transfer"
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" on keywest !\n");
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if (host->state != state_stop) {
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DBG_LOW("KW: Timeout !\n");
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host->result = -EIO;
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goto stop;
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}
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if (host->state == state_stop) {
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ack = kw_read_reg(reg_status);
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if (ack & KW_I2C_STAT_BUSY)
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kw_write_reg(reg_status, 0);
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host->state = state_idle;
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kw_write_reg(reg_ier, 0x00);
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if (!host->polled)
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complete(&host->complete);
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kw_i2c_do_stop(host, -EIO);
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return;
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}
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ack = kw_read_reg(reg_status);
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if (ack & KW_I2C_STAT_BUSY)
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kw_write_reg(reg_status, 0);
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host->state = state_idle;
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kw_write_reg(reg_ier, 0x00);
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if (!host->polled)
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complete(&host->complete);
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return;
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}
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if (isr & KW_I2C_IRQ_ADDR) {
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ack = kw_read_reg(reg_status);
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if (host->state != state_addr) {
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kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
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WRONG_STATE("KW_I2C_IRQ_ADDR");
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host->result = -EIO;
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goto stop;
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kw_i2c_do_stop(host, -EIO);
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}
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if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
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host->result = -ENODEV;
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DBG_LOW("KW: NAK on address\n");
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host->result = -ENXIO;
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host->state = state_stop;
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return;
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DBG_LOW("KW: NAK on address\n");
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} else {
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if (host->len == 0) {
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kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
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goto stop;
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}
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if (host->rw) {
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if (host->len == 0)
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kw_i2c_do_stop(host, 0);
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else if (host->rw) {
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host->state = state_read;
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if (host->len > 1)
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kw_write_reg(reg_control,
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@ -308,25 +310,19 @@ static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
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ack = kw_read_reg(reg_status);
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if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
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DBG_LOW("KW: nack on data write\n");
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host->result = -EIO;
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goto stop;
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host->result = -EFBIG;
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host->state = state_stop;
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} else if (host->len) {
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kw_write_reg(reg_data, *(host->data++));
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host->len--;
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} else {
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kw_write_reg(reg_control, KW_I2C_CTL_STOP);
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host->state = state_stop;
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host->result = 0;
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}
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kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
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} else
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kw_i2c_do_stop(host, 0);
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} else {
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kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
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WRONG_STATE("KW_I2C_IRQ_DATA");
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if (host->state != state_stop) {
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host->result = -EIO;
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goto stop;
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}
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if (host->state != state_stop)
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kw_i2c_do_stop(host, -EIO);
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}
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kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
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}
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if (isr & KW_I2C_IRQ_STOP) {
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@ -340,14 +336,10 @@ static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
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complete(&host->complete);
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}
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/* Below should only happen in manual mode which we don't use ... */
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if (isr & KW_I2C_IRQ_START)
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kw_write_reg(reg_isr, KW_I2C_IRQ_START);
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return;
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stop:
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kw_write_reg(reg_control, KW_I2C_CTL_STOP);
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host->state = state_stop;
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return;
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}
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/* Interrupt handler */
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@ -544,11 +536,11 @@ static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
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return NULL;
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}
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/* Make sure IRA is disabled */
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/* Make sure IRQ is disabled */
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kw_write_reg(reg_ier, 0);
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/* Request chip interrupt */
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if (request_irq(host->irq, kw_i2c_irq, SA_SHIRQ, "keywest i2c", host))
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if (request_irq(host->irq, kw_i2c_irq, 0, "keywest i2c", host))
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host->irq = NO_IRQ;
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printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n",
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