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arm64: dts: allwinner: h5: Add clock to CPU cores

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The ARM CPU cores are fed by the CPU clock from the CCU. Add a
reference to the clock for each CPU core, along with the clock
transition latency.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-5-wens@kernel.org
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Chen-Yu Tsai 2020-07-18 00:00:49 +08:00 committed by Maxime Ripard
parent e4dae01bf0
commit 5fa21c1354
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GPG Key ID: E3EF0D6F671851C5
1 changed files with 8 additions and 0 deletions
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arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
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@ -13,6 +13,8 @@ cpu0: cpu@0 {
device_type = "cpu"; device_type = "cpu";
reg = <0>; reg = <0>;
enable-method = "psci"; enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
}; };
cpu1: cpu@1 { cpu1: cpu@1 {
@ -20,6 +22,8 @@ cpu1: cpu@1 {
device_type = "cpu"; device_type = "cpu";
reg = <1>; reg = <1>;
enable-method = "psci"; enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
}; };
cpu2: cpu@2 { cpu2: cpu@2 {
@ -27,6 +31,8 @@ cpu2: cpu@2 {
device_type = "cpu"; device_type = "cpu";
reg = <2>; reg = <2>;
enable-method = "psci"; enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
}; };
cpu3: cpu@3 { cpu3: cpu@3 {
@ -34,6 +40,8 @@ cpu3: cpu@3 {
device_type = "cpu"; device_type = "cpu";
reg = <3>; reg = <3>;
enable-method = "psci"; enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
}; };
}; };