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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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igc: Add basic skeleton for PTP
This allows the creation of the /dev/ptpX device for i225, and reading and writing the time. Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Vinicius Costa Gomes
Jeff Kirsher
parent
df2c2ba831
commit
5f2958052c
@ -8,4 +8,4 @@
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obj-$(CONFIG_IGC) += igc.o
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igc-objs := igc_main.o igc_mac.o igc_i225.o igc_base.o igc_nvm.o igc_phy.o \
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igc_ethtool.o
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igc_ethtool.o igc_ptp.o
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@ -10,6 +10,9 @@
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#include <linux/vmalloc.h>
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#include <linux/ethtool.h>
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#include <linux/sctp.h>
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#include <linux/ptp_clock_kernel.h>
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#include <linux/timecounter.h>
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#include <linux/net_tstamp.h>
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#include "igc_hw.h"
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@ -45,11 +48,15 @@ extern char igc_driver_version[];
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#define IGC_REGS_LEN 740
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#define IGC_RETA_SIZE 128
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/* flags controlling PTP/1588 function */
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#define IGC_PTP_ENABLED BIT(0)
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/* Interrupt defines */
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#define IGC_START_ITR 648 /* ~6000 ints/sec */
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#define IGC_FLAG_HAS_MSI BIT(0)
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#define IGC_FLAG_QUEUE_PAIRS BIT(3)
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#define IGC_FLAG_DMAC BIT(4)
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#define IGC_FLAG_PTP BIT(8)
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#define IGC_FLAG_NEED_LINK_UPDATE BIT(9)
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#define IGC_FLAG_MEDIA_RESET BIT(10)
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#define IGC_FLAG_MAS_ENABLE BIT(12)
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@ -432,6 +439,20 @@ struct igc_adapter {
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unsigned long link_check_timeout;
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struct igc_info ei;
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struct ptp_clock *ptp_clock;
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struct ptp_clock_info ptp_caps;
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struct work_struct ptp_tx_work;
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struct sk_buff *ptp_tx_skb;
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struct hwtstamp_config tstamp_config;
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unsigned long ptp_tx_start;
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unsigned long last_rx_ptp_check;
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unsigned long last_rx_timestamp;
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unsigned int ptp_flags;
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/* System time value lock */
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spinlock_t tmreg_lock;
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struct cyclecounter cc;
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struct timecounter tc;
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};
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/* igc_desc_unused - calculate if we have unused descriptors */
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@ -515,6 +536,11 @@ int igc_add_filter(struct igc_adapter *adapter,
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int igc_erase_filter(struct igc_adapter *adapter,
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struct igc_nfc_filter *input);
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void igc_ptp_init(struct igc_adapter *adapter);
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void igc_ptp_reset(struct igc_adapter *adapter);
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void igc_ptp_stop(struct igc_adapter *adapter);
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int igc_ptp_set_ts_config(struct net_device *netdev, struct ifreq *ifr);
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int igc_ptp_get_ts_config(struct net_device *netdev, struct ifreq *ifr);
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#define igc_rx_pg_size(_ring) (PAGE_SIZE << igc_rx_pg_order(_ring))
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#define IGC_TXD_DCMD (IGC_ADVTXD_DCMD_EOP | IGC_ADVTXD_DCMD_RS)
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@ -218,6 +218,7 @@
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#define IGC_ICR_RXDMT0 BIT(4) /* Rx desc min. threshold (0) */
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#define IGC_ICR_RXO BIT(6) /* Rx overrun */
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#define IGC_ICR_RXT0 BIT(7) /* Rx timer intr (ring 0) */
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#define IGC_ICR_TS BIT(19) /* Time Sync Interrupt */
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#define IGC_ICR_DRSTA BIT(30) /* Device Reset Asserted */
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/* If this bit asserted, the driver should claim the interrupt */
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@ -240,6 +241,7 @@
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#define IGC_IMS_DRSTA IGC_ICR_DRSTA /* Device Reset Asserted */
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#define IGC_IMS_RXT0 IGC_ICR_RXT0 /* Rx timer intr */
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#define IGC_IMS_RXDMT0 IGC_ICR_RXDMT0 /* Rx desc min. threshold */
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#define IGC_IMS_TS IGC_ICR_TS /* Time Sync Interrupt */
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#define IGC_QVECTOR_MASK 0x7FFC /* Q-vector mask */
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#define IGC_ITR_VAL_MASK 0x04 /* ITR value mask */
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@ -355,6 +357,16 @@
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#define I225_RXPBSIZE_DEFAULT 0x000000A2 /* RXPBSIZE default */
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#define I225_TXPBSIZE_DEFAULT 0x04000014 /* TXPBSIZE default */
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/* Time Sync Interrupt Causes */
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#define IGC_TSICR_SYS_WRAP BIT(0) /* SYSTIM Wrap around. */
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#define IGC_TSICR_TXTS BIT(1) /* Transmit Timestamp. */
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#define IGC_TSICR_TT0 BIT(3) /* Target Time 0 Trigger. */
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#define IGC_TSICR_TT1 BIT(4) /* Target Time 1 Trigger. */
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#define IGC_TSICR_AUTT0 BIT(5) /* Auxiliary Timestamp 0 Taken. */
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#define IGC_TSICR_AUTT1 BIT(6) /* Auxiliary Timestamp 1 Taken. */
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#define IGC_TSICR_INTERRUPTS IGC_TSICR_TXTS
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/* Receive Checksum Control */
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#define IGC_RXCSUM_CRCOFL 0x00000800 /* CRC32 offload enable */
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#define IGC_RXCSUM_PCSD 0x00002000 /* packet checksum disabled */
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@ -102,6 +102,9 @@ void igc_reset(struct igc_adapter *adapter)
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if (!netif_running(adapter->netdev))
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igc_power_down_link(adapter);
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/* Re-enable PTP, where applicable. */
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igc_ptp_reset(adapter);
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igc_get_phy_info(hw);
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}
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@ -4277,6 +4280,24 @@ static int igc_close(struct net_device *netdev)
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return 0;
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}
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/**
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* igc_ioctl - Access the hwtstamp interface
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* @netdev: network interface device structure
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* @ifreq: interface request data
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* @cmd: ioctl command
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**/
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static int igc_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
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{
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switch (cmd) {
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case SIOCGHWTSTAMP:
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return igc_ptp_get_ts_config(netdev, ifr);
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case SIOCSHWTSTAMP:
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return igc_ptp_set_ts_config(netdev, ifr);
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default:
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return -EOPNOTSUPP;
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}
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}
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static const struct net_device_ops igc_netdev_ops = {
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.ndo_open = igc_open,
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.ndo_stop = igc_close,
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@ -4288,6 +4309,7 @@ static const struct net_device_ops igc_netdev_ops = {
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.ndo_fix_features = igc_fix_features,
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.ndo_set_features = igc_set_features,
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.ndo_features_check = igc_features_check,
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.ndo_do_ioctl = igc_ioctl,
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};
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/* PCIe configuration access */
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@ -4588,6 +4610,9 @@ static int igc_probe(struct pci_dev *pdev,
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/* carrier off reporting is important to ethtool even BEFORE open */
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netif_carrier_off(netdev);
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/* do hw tstamp init after resetting */
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igc_ptp_init(adapter);
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/* Check if Media Autosense is enabled */
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adapter->ei = *ei;
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@ -4629,6 +4654,8 @@ static void igc_remove(struct pci_dev *pdev)
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struct net_device *netdev = pci_get_drvdata(pdev);
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struct igc_adapter *adapter = netdev_priv(netdev);
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igc_ptp_stop(adapter);
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set_bit(__IGC_DOWN, &adapter->state);
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del_timer_sync(&adapter->watchdog_timer);
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349
drivers/net/ethernet/intel/igc/igc_ptp.c
Normal file
349
drivers/net/ethernet/intel/igc/igc_ptp.c
Normal file
@ -0,0 +1,349 @@
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2019 Intel Corporation */
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#include "igc.h"
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/pci.h>
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#include <linux/ptp_classify.h>
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#include <linux/clocksource.h>
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#define INCVALUE_MASK 0x7fffffff
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#define ISGN 0x80000000
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#define IGC_SYSTIM_OVERFLOW_PERIOD (HZ * 60 * 9)
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#define IGC_PTP_TX_TIMEOUT (HZ * 15)
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/* SYSTIM read access for I225 */
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static void igc_ptp_read_i225(struct igc_adapter *adapter,
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struct timespec64 *ts)
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{
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struct igc_hw *hw = &adapter->hw;
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u32 sec, nsec;
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/* The timestamp latches on lowest register read. For I210/I211, the
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* lowest register is SYSTIMR. Since we only need to provide nanosecond
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* resolution, we can ignore it.
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*/
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rd32(IGC_SYSTIMR);
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nsec = rd32(IGC_SYSTIML);
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sec = rd32(IGC_SYSTIMH);
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ts->tv_sec = sec;
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ts->tv_nsec = nsec;
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}
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static void igc_ptp_write_i225(struct igc_adapter *adapter,
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const struct timespec64 *ts)
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{
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struct igc_hw *hw = &adapter->hw;
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/* Writing the SYSTIMR register is not necessary as it only
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* provides sub-nanosecond resolution.
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*/
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wr32(IGC_SYSTIML, ts->tv_nsec);
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wr32(IGC_SYSTIMH, ts->tv_sec);
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}
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static int igc_ptp_adjfine_i225(struct ptp_clock_info *ptp, long scaled_ppm)
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{
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struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
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ptp_caps);
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struct igc_hw *hw = &igc->hw;
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int neg_adj = 0;
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u64 rate;
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u32 inca;
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if (scaled_ppm < 0) {
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neg_adj = 1;
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scaled_ppm = -scaled_ppm;
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}
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rate = scaled_ppm;
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rate <<= 14;
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rate = div_u64(rate, 78125);
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inca = rate & INCVALUE_MASK;
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if (neg_adj)
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inca |= ISGN;
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wr32(IGC_TIMINCA, inca);
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return 0;
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}
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static int igc_ptp_adjtime_i225(struct ptp_clock_info *ptp, s64 delta)
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{
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struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
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ptp_caps);
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struct timespec64 now, then = ns_to_timespec64(delta);
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unsigned long flags;
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spin_lock_irqsave(&igc->tmreg_lock, flags);
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igc_ptp_read_i225(igc, &now);
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now = timespec64_add(now, then);
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igc_ptp_write_i225(igc, (const struct timespec64 *)&now);
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spin_unlock_irqrestore(&igc->tmreg_lock, flags);
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return 0;
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}
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static int igc_ptp_gettimex64_i225(struct ptp_clock_info *ptp,
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struct timespec64 *ts,
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struct ptp_system_timestamp *sts)
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{
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struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
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ptp_caps);
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struct igc_hw *hw = &igc->hw;
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unsigned long flags;
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spin_lock_irqsave(&igc->tmreg_lock, flags);
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ptp_read_system_prets(sts);
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rd32(IGC_SYSTIMR);
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ptp_read_system_postts(sts);
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ts->tv_nsec = rd32(IGC_SYSTIML);
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ts->tv_sec = rd32(IGC_SYSTIMH);
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spin_unlock_irqrestore(&igc->tmreg_lock, flags);
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return 0;
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}
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static int igc_ptp_settime_i225(struct ptp_clock_info *ptp,
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const struct timespec64 *ts)
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{
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struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
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ptp_caps);
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unsigned long flags;
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spin_lock_irqsave(&igc->tmreg_lock, flags);
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igc_ptp_write_i225(igc, ts);
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spin_unlock_irqrestore(&igc->tmreg_lock, flags);
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return 0;
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}
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static int igc_ptp_feature_enable_i225(struct ptp_clock_info *ptp,
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struct ptp_clock_request *rq, int on)
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{
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return -EOPNOTSUPP;
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}
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static int igc_ptp_set_timestamp_mode(struct igc_adapter *adapter,
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struct hwtstamp_config *config)
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{
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return 0;
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}
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void igc_ptp_tx_hang(struct igc_adapter *adapter)
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{
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bool timeout = time_is_before_jiffies(adapter->ptp_tx_start +
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IGC_PTP_TX_TIMEOUT);
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struct igc_hw *hw = &adapter->hw;
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if (!adapter->ptp_tx_skb)
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return;
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if (!test_bit(__IGC_PTP_TX_IN_PROGRESS, &adapter->state))
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return;
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/* If we haven't received a timestamp within the timeout, it is
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* reasonable to assume that it will never occur, so we can unlock the
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* timestamp bit when this occurs.
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*/
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if (timeout) {
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cancel_work_sync(&adapter->ptp_tx_work);
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dev_kfree_skb_any(adapter->ptp_tx_skb);
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adapter->ptp_tx_skb = NULL;
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clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);
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adapter->tx_hwtstamp_timeouts++;
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/* Clear the Tx valid bit in TSYNCTXCTL register to enable
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* interrupt
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*/
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rd32(IGC_TXSTMPH);
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dev_warn(&adapter->pdev->dev, "clearing Tx timestamp hang\n");
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}
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}
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void igc_ptp_tx_work(struct work_struct *work)
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{
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}
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/**
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* igc_ptp_set_ts_config - set hardware time stamping config
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* @netdev: network interface device structure
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* @ifreq: interface request data
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*
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**/
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int igc_ptp_set_ts_config(struct net_device *netdev, struct ifreq *ifr)
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{
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struct igc_adapter *adapter = netdev_priv(netdev);
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struct hwtstamp_config config;
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int err;
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if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
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return -EFAULT;
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err = igc_ptp_set_timestamp_mode(adapter, &config);
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if (err)
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return err;
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/* save these settings for future reference */
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memcpy(&adapter->tstamp_config, &config,
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sizeof(adapter->tstamp_config));
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return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
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-EFAULT : 0;
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}
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/**
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* igc_ptp_get_ts_config - get hardware time stamping config
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* @netdev: network interface device structure
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* @ifreq: interface request data
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*
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* Get the hwtstamp_config settings to return to the user. Rather than attempt
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* to deconstruct the settings from the registers, just return a shadow copy
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* of the last known settings.
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**/
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int igc_ptp_get_ts_config(struct net_device *netdev, struct ifreq *ifr)
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{
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struct igc_adapter *adapter = netdev_priv(netdev);
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struct hwtstamp_config *config = &adapter->tstamp_config;
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return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ?
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-EFAULT : 0;
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}
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/**
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* igc_ptp_init - Initialize PTP functionality
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* @adapter: Board private structure
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*
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* This function is called at device probe to initialize the PTP
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* functionality.
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*/
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void igc_ptp_init(struct igc_adapter *adapter)
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{
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struct net_device *netdev = adapter->netdev;
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struct igc_hw *hw = &adapter->hw;
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switch (hw->mac.type) {
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case igc_i225:
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snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
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adapter->ptp_caps.owner = THIS_MODULE;
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adapter->ptp_caps.max_adj = 62499999;
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adapter->ptp_caps.adjfine = igc_ptp_adjfine_i225;
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adapter->ptp_caps.adjtime = igc_ptp_adjtime_i225;
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adapter->ptp_caps.gettimex64 = igc_ptp_gettimex64_i225;
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adapter->ptp_caps.settime64 = igc_ptp_settime_i225;
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adapter->ptp_caps.enable = igc_ptp_feature_enable_i225;
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break;
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default:
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adapter->ptp_clock = NULL;
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return;
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}
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spin_lock_init(&adapter->tmreg_lock);
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INIT_WORK(&adapter->ptp_tx_work, igc_ptp_tx_work);
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adapter->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
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adapter->tstamp_config.tx_type = HWTSTAMP_TX_OFF;
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igc_ptp_reset(adapter);
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adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps,
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&adapter->pdev->dev);
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if (IS_ERR(adapter->ptp_clock)) {
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adapter->ptp_clock = NULL;
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dev_err(&adapter->pdev->dev, "ptp_clock_register failed\n");
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} else if (adapter->ptp_clock) {
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||||
dev_info(&adapter->pdev->dev, "added PHC on %s\n",
|
||||
adapter->netdev->name);
|
||||
adapter->ptp_flags |= IGC_PTP_ENABLED;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* igc_ptp_suspend - Disable PTP work items and prepare for suspend
|
||||
* @adapter: Board private structure
|
||||
*
|
||||
* This function stops the overflow check work and PTP Tx timestamp work, and
|
||||
* will prepare the device for OS suspend.
|
||||
*/
|
||||
void igc_ptp_suspend(struct igc_adapter *adapter)
|
||||
{
|
||||
if (!(adapter->ptp_flags & IGC_PTP_ENABLED))
|
||||
return;
|
||||
|
||||
cancel_work_sync(&adapter->ptp_tx_work);
|
||||
if (adapter->ptp_tx_skb) {
|
||||
dev_kfree_skb_any(adapter->ptp_tx_skb);
|
||||
adapter->ptp_tx_skb = NULL;
|
||||
clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* igc_ptp_stop - Disable PTP device and stop the overflow check.
|
||||
* @adapter: Board private structure.
|
||||
*
|
||||
* This function stops the PTP support and cancels the delayed work.
|
||||
**/
|
||||
void igc_ptp_stop(struct igc_adapter *adapter)
|
||||
{
|
||||
igc_ptp_suspend(adapter);
|
||||
|
||||
if (adapter->ptp_clock) {
|
||||
ptp_clock_unregister(adapter->ptp_clock);
|
||||
dev_info(&adapter->pdev->dev, "removed PHC on %s\n",
|
||||
adapter->netdev->name);
|
||||
adapter->ptp_flags &= ~IGC_PTP_ENABLED;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* igc_ptp_reset - Re-enable the adapter for PTP following a reset.
|
||||
* @adapter: Board private structure.
|
||||
*
|
||||
* This function handles the reset work required to re-enable the PTP device.
|
||||
**/
|
||||
void igc_ptp_reset(struct igc_adapter *adapter)
|
||||
{
|
||||
struct igc_hw *hw = &adapter->hw;
|
||||
unsigned long flags;
|
||||
|
||||
/* reset the tstamp_config */
|
||||
igc_ptp_set_timestamp_mode(adapter, &adapter->tstamp_config);
|
||||
|
||||
spin_lock_irqsave(&adapter->tmreg_lock, flags);
|
||||
|
||||
switch (adapter->hw.mac.type) {
|
||||
case igc_i225:
|
||||
wr32(IGC_TSAUXC, 0x0);
|
||||
wr32(IGC_TSSDP, 0x0);
|
||||
wr32(IGC_TSIM, IGC_TSICR_INTERRUPTS);
|
||||
wr32(IGC_IMS, IGC_IMS_TS);
|
||||
break;
|
||||
default:
|
||||
/* No work to do. */
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* Re-initialize the timer. */
|
||||
if (hw->mac.type == igc_i225) {
|
||||
struct timespec64 ts64 = ktime_to_timespec64(ktime_get_real());
|
||||
|
||||
igc_ptp_write_i225(adapter, &ts64);
|
||||
} else {
|
||||
timecounter_init(&adapter->tc, &adapter->cc,
|
||||
ktime_to_ns(ktime_get_real()));
|
||||
}
|
||||
out:
|
||||
spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
|
||||
|
||||
wrfl();
|
||||
}
|
||||
@ -209,6 +209,30 @@
|
||||
#define IGC_LENERRS 0x04138 /* Length Errors Count */
|
||||
#define IGC_HRMPC 0x0A018 /* Header Redirection Missed Packet Count */
|
||||
|
||||
/* Time sync registers */
|
||||
#define IGC_TSICR 0x0B66C /* Time Sync Interrupt Cause */
|
||||
#define IGC_TSIM 0x0B674 /* Time Sync Interrupt Mask Register */
|
||||
#define IGC_TSAUXC 0x0B640 /* Timesync Auxiliary Control register */
|
||||
#define IGC_TSYNCRXCTL 0x0B620 /* Rx Time Sync Control register - RW */
|
||||
#define IGC_TSYNCTXCTL 0x0B614 /* Tx Time Sync Control register - RW */
|
||||
#define IGC_TSYNCRXCFG 0x05F50 /* Time Sync Rx Configuration - RW */
|
||||
#define IGC_TSSDP 0x0003C /* Time Sync SDP Configuration Register - RW */
|
||||
|
||||
#define IGC_IMIR(_i) (0x05A80 + ((_i) * 4)) /* Immediate Interrupt */
|
||||
#define IGC_IMIREXT(_i) (0x05AA0 + ((_i) * 4)) /* Immediate INTR Ext*/
|
||||
|
||||
#define IGC_FTQF(_n) (0x059E0 + (4 * (_n))) /* 5-tuple Queue Fltr */
|
||||
/* System Time Registers */
|
||||
#define IGC_SYSTIML 0x0B600 /* System time register Low - RO */
|
||||
#define IGC_SYSTIMH 0x0B604 /* System time register High - RO */
|
||||
#define IGC_SYSTIMR 0x0B6F8 /* System time register Residue */
|
||||
#define IGC_TIMINCA 0x0B608 /* Increment attributes register - RW */
|
||||
|
||||
#define IGC_RXSTMPL 0x0B624 /* Rx timestamp Low - RO */
|
||||
#define IGC_RXSTMPH 0x0B628 /* Rx timestamp High - RO */
|
||||
#define IGC_TXSTMPL 0x0B618 /* Tx timestamp value Low - RO */
|
||||
#define IGC_TXSTMPH 0x0B61C /* Tx timestamp value High - RO */
|
||||
|
||||
/* Management registers */
|
||||
#define IGC_MANC 0x05820 /* Management Control - RW */
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user