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drm/amdgpu: enable async gfx ring for navi14
Same as navi10. Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Jack Xiao <Jack.Xiao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -389,7 +389,7 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
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dev_warn(adev->dev, "no memory to create MQD backup for ring %s\n", ring->name);
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}
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if (adev->asic_type == CHIP_NAVI10 && amdgpu_async_gfx_ring) {
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if (adev->asic_type >= CHIP_NAVI10 && amdgpu_async_gfx_ring) {
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/* create MQD for each KGQ */
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for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
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ring = &adev->gfx.gfx_ring[i];
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@ -437,7 +437,7 @@ void amdgpu_gfx_mqd_sw_fini(struct amdgpu_device *adev)
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struct amdgpu_ring *ring = NULL;
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int i;
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if (adev->asic_type == CHIP_NAVI10 && amdgpu_async_gfx_ring) {
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if (adev->asic_type >= CHIP_NAVI10 && amdgpu_async_gfx_ring) {
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for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
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ring = &adev->gfx.gfx_ring[i];
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kfree(adev->gfx.me.mqd_backup[i]);
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@ -456,7 +456,7 @@ void amdgpu_gfx_mqd_sw_fini(struct amdgpu_device *adev)
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}
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ring = &adev->gfx.kiq.ring;
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if (adev->asic_type == CHIP_NAVI10 && amdgpu_async_gfx_ring)
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if (adev->asic_type >= CHIP_NAVI10 && amdgpu_async_gfx_ring)
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kfree(adev->gfx.me.mqd_backup[AMDGPU_MAX_GFX_RINGS]);
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kfree(adev->gfx.mec.mqd_backup[AMDGPU_MAX_COMPUTE_RINGS]);
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amdgpu_bo_free_kernel(&ring->mqd_obj,
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