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mmc: sdhci-of-esdhc: add erratum A-009204 support
In the event of that any data error (like, IRQSTAT[DCE]) occurs during an eSDHC data transaction where DMA is used for data transfer to/from the system memory, setting the SYSCTL[RSTD] register may cause a system hang. If software sets the register SYSCTL[RSTD] to 1 for error recovery while DMA transferring is not complete, eSDHC may hang the system bus. This happens because the software register SYSCTL[RSTD] resets the DMA engine without waiting for the completion of pending system transactions. This erratum is to fix this issue. Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -694,6 +694,9 @@ static void esdhc_reset(struct sdhci_host *host, u8 mask)
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sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
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sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
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if (of_find_compatible_node(NULL, NULL, "fsl,p2020-esdhc"))
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mdelay(5);
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if (mask & SDHCI_RESET_ALL) {
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val = sdhci_readl(host, ESDHC_TBCTL);
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val &= ~ESDHC_TB_EN;
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