mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 16:10:56 +07:00
PCI update for v3.18:
NVIDIA Tegra - Use physical range for I/O mapping (Thierry Reding) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUf1W0AAoJEFmIoMA60/r8wIUP/iFJKucfHJUDo3i/R96vXYhv /PEosMwQu2FnfLC13vOnUnx9m2uv2gpthhI255guxm3DUIsurOcdBGR7ZoaQcMkD 0NMf/UeGlKPFkXk5ltJiO4SHsAv8ITMV7pYcUl4DX0E288kBjM4LV69+aprKw7GY ULZDDqIE5x6SkmBv5PopTr7M+Z6omQ+nxZ6txMAM3ks2+rku6SzqPaWZFhpTinqn AJlx9gqjN8OLuPNXqHia+hBzPk9xvisCOZ0kOXpS3ipeXvyLVPThqhO1fG9RFY0a BXK+l8E7z3zcwIZIQMsVl3zuxYVpjQhgNlPqFyYE+TCW/kG6V3STWzmYW/kCT0ax ipVeSKXZnmcf7iKZ78UdW8bXZGHi6WNouaN0/NAtXh9Gln8P2qOuSBwv1H3374in NnIFPr8bFNXgSr8OPZWIqhwQEdPZgydxq28DxIEZCdYo4idP3Q+yElQPpmZzBeeC 8rnFyHsBFdazr7W44jsPnn45Fdy2LEEo07v80buj/RwdwMV2zj2OFLUMT9Nlyu6k p7HLM40FZlyeu+OHjzc0zu/GjQ5CAt4SV0DSQ/Gi80Bq1X+qHPVc7u6MoKmS0wYr wZ2/DCXHloMRsITZ6fyPVNsUHB9S9M01V4VCnzCSeJ65ArvNeP5+7yzQKUIEKLQ9 FclPrRsT+jaJUWVpNLjE =KWwE -----END PGP SIGNATURE----- Merge tag 'pci-v3.18-fixes-4' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI fix from Bjorn Helgaas: "This fixes a Tegra20 regression that we introduced during the v3.18 merge window" * tag 'pci-v3.18-fixes-4' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: tegra: Use physical range for I/O mapping
This commit is contained in:
commit
5dc626358f
@ -276,6 +276,7 @@ struct tegra_pcie {
|
|||||||
|
|
||||||
struct resource all;
|
struct resource all;
|
||||||
struct resource io;
|
struct resource io;
|
||||||
|
struct resource pio;
|
||||||
struct resource mem;
|
struct resource mem;
|
||||||
struct resource prefetch;
|
struct resource prefetch;
|
||||||
struct resource busn;
|
struct resource busn;
|
||||||
@ -658,7 +659,6 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
|
|||||||
{
|
{
|
||||||
struct tegra_pcie *pcie = sys_to_pcie(sys);
|
struct tegra_pcie *pcie = sys_to_pcie(sys);
|
||||||
int err;
|
int err;
|
||||||
phys_addr_t io_start;
|
|
||||||
|
|
||||||
err = devm_request_resource(pcie->dev, &pcie->all, &pcie->mem);
|
err = devm_request_resource(pcie->dev, &pcie->all, &pcie->mem);
|
||||||
if (err < 0)
|
if (err < 0)
|
||||||
@ -668,14 +668,12 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
|
|||||||
if (err)
|
if (err)
|
||||||
return err;
|
return err;
|
||||||
|
|
||||||
io_start = pci_pio_to_address(pcie->io.start);
|
|
||||||
|
|
||||||
pci_add_resource_offset(&sys->resources, &pcie->mem, sys->mem_offset);
|
pci_add_resource_offset(&sys->resources, &pcie->mem, sys->mem_offset);
|
||||||
pci_add_resource_offset(&sys->resources, &pcie->prefetch,
|
pci_add_resource_offset(&sys->resources, &pcie->prefetch,
|
||||||
sys->mem_offset);
|
sys->mem_offset);
|
||||||
pci_add_resource(&sys->resources, &pcie->busn);
|
pci_add_resource(&sys->resources, &pcie->busn);
|
||||||
|
|
||||||
pci_ioremap_io(nr * SZ_64K, io_start);
|
pci_ioremap_io(pcie->pio.start, pcie->io.start);
|
||||||
|
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
@ -786,7 +784,6 @@ static irqreturn_t tegra_pcie_isr(int irq, void *arg)
|
|||||||
static void tegra_pcie_setup_translations(struct tegra_pcie *pcie)
|
static void tegra_pcie_setup_translations(struct tegra_pcie *pcie)
|
||||||
{
|
{
|
||||||
u32 fpci_bar, size, axi_address;
|
u32 fpci_bar, size, axi_address;
|
||||||
phys_addr_t io_start = pci_pio_to_address(pcie->io.start);
|
|
||||||
|
|
||||||
/* Bar 0: type 1 extended configuration space */
|
/* Bar 0: type 1 extended configuration space */
|
||||||
fpci_bar = 0xfe100000;
|
fpci_bar = 0xfe100000;
|
||||||
@ -799,7 +796,7 @@ static void tegra_pcie_setup_translations(struct tegra_pcie *pcie)
|
|||||||
/* Bar 1: downstream IO bar */
|
/* Bar 1: downstream IO bar */
|
||||||
fpci_bar = 0xfdfc0000;
|
fpci_bar = 0xfdfc0000;
|
||||||
size = resource_size(&pcie->io);
|
size = resource_size(&pcie->io);
|
||||||
axi_address = io_start;
|
axi_address = pcie->io.start;
|
||||||
afi_writel(pcie, axi_address, AFI_AXI_BAR1_START);
|
afi_writel(pcie, axi_address, AFI_AXI_BAR1_START);
|
||||||
afi_writel(pcie, size >> 12, AFI_AXI_BAR1_SZ);
|
afi_writel(pcie, size >> 12, AFI_AXI_BAR1_SZ);
|
||||||
afi_writel(pcie, fpci_bar, AFI_FPCI_BAR1);
|
afi_writel(pcie, fpci_bar, AFI_FPCI_BAR1);
|
||||||
@ -1690,8 +1687,23 @@ static int tegra_pcie_parse_dt(struct tegra_pcie *pcie)
|
|||||||
|
|
||||||
switch (res.flags & IORESOURCE_TYPE_BITS) {
|
switch (res.flags & IORESOURCE_TYPE_BITS) {
|
||||||
case IORESOURCE_IO:
|
case IORESOURCE_IO:
|
||||||
memcpy(&pcie->io, &res, sizeof(res));
|
memcpy(&pcie->pio, &res, sizeof(res));
|
||||||
pcie->io.name = np->full_name;
|
pcie->pio.name = np->full_name;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The Tegra PCIe host bridge uses this to program the
|
||||||
|
* mapping of the I/O space to the physical address,
|
||||||
|
* so we override the .start and .end fields here that
|
||||||
|
* of_pci_range_to_resource() converted to I/O space.
|
||||||
|
* We also set the IORESOURCE_MEM type to clarify that
|
||||||
|
* the resource is in the physical memory space.
|
||||||
|
*/
|
||||||
|
pcie->io.start = range.cpu_addr;
|
||||||
|
pcie->io.end = range.cpu_addr + range.size - 1;
|
||||||
|
pcie->io.flags = IORESOURCE_MEM;
|
||||||
|
pcie->io.name = "I/O";
|
||||||
|
|
||||||
|
memcpy(&res, &pcie->io, sizeof(res));
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case IORESOURCE_MEM:
|
case IORESOURCE_MEM:
|
||||||
|
Loading…
Reference in New Issue
Block a user