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ARM: tegra: fix sort order of USB PHY nodes
The USB PHY nodes are all grouped together rather than being sorted based on reg address like all other nodes fix this. I apologize for the churn; I should have noticed this during review of the patches that caused this. Signed-off-by: Stephen Warren <swarren@nvidia.com>
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@ -442,31 +442,6 @@ memory-controller@7000f400 {
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#size-cells = <0>;
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};
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phy1: usb-phy@c5000400 {
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compatible = "nvidia,tegra20-usb-phy";
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reg = <0xc5000400 0x3c00>;
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phy_type = "utmi";
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nvidia,has-legacy-mode;
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clocks = <&tegra_car 22>, <&tegra_car 127>;
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clock-names = "phy", "pll_u";
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};
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phy2: usb-phy@c5004400 {
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compatible = "nvidia,tegra20-usb-phy";
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reg = <0xc5004400 0x3c00>;
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phy_type = "ulpi";
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clocks = <&tegra_car 94>, <&tegra_car 127>;
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clock-names = "phy", "pll_u";
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};
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phy3: usb-phy@c5008400 {
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compatible = "nvidia,tegra20-usb-phy";
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reg = <0xc5008400 0x3C00>;
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phy_type = "utmi";
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clocks = <&tegra_car 22>, <&tegra_car 127>;
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clock-names = "phy", "pll_u";
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};
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usb@c5000000 {
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compatible = "nvidia,tegra20-ehci", "usb-ehci";
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reg = <0xc5000000 0x4000>;
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@ -479,6 +454,15 @@ usb@c5000000 {
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status = "disabled";
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};
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phy1: usb-phy@c5000400 {
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compatible = "nvidia,tegra20-usb-phy";
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reg = <0xc5000400 0x3c00>;
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phy_type = "utmi";
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nvidia,has-legacy-mode;
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clocks = <&tegra_car 22>, <&tegra_car 127>;
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clock-names = "phy", "pll_u";
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};
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usb@c5004000 {
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compatible = "nvidia,tegra20-ehci", "usb-ehci";
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reg = <0xc5004000 0x4000>;
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@ -489,6 +473,14 @@ usb@c5004000 {
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status = "disabled";
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};
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phy2: usb-phy@c5004400 {
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compatible = "nvidia,tegra20-usb-phy";
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reg = <0xc5004400 0x3c00>;
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phy_type = "ulpi";
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clocks = <&tegra_car 94>, <&tegra_car 127>;
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clock-names = "phy", "pll_u";
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};
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usb@c5008000 {
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compatible = "nvidia,tegra20-ehci", "usb-ehci";
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reg = <0xc5008000 0x4000>;
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@ -499,6 +491,14 @@ usb@c5008000 {
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status = "disabled";
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};
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phy3: usb-phy@c5008400 {
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compatible = "nvidia,tegra20-usb-phy";
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reg = <0xc5008400 0x3c00>;
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phy_type = "utmi";
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clocks = <&tegra_car 22>, <&tegra_car 127>;
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clock-names = "phy", "pll_u";
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};
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sdhci@c8000000 {
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compatible = "nvidia,tegra20-sdhci";
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reg = <0xc8000000 0x200>;
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