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ALSA: intel8x0m: wait a bit before warm reset check
At every resume a laptop I use prints this message (at KERN_ERR level): ALSA sound/pci/intel8x0m.c:904: AC'97 warm reset still in progress? [0x2] The thing to note here is that 0x2 corresponds to ICH_AC97COLD. Ie, what seems to be happening is that the register involved indicated a warm reset for some time (as the ICH_AC97WARM bit was set) but by the time the warning is printed, and that same register is checked again, that bit is already cleared and only the ICH_AC97COLD bit is still set. It turns out a warm reset needs some time to settle, but it is currently checked right away. The test therefore fails the first time it is done and schedule_timeout_uninterruptible() will be called. Once we return from that jiffies is already (far) past end_time on this laptop, so we exit the loop, print a warning, and exit the function while the warm reset actually succeeded. A way to fix this is to call usleep_range() after writing to the register involved. A handful of tests suggest 500 usecs is a safe value. (This might punish the "finish cold reset" case, but on this laptop such a cold reset apparently never happens, so I can't say for sure.) While we're at it drop the extra single tick from end_time, as it looks rather silly. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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@ -894,7 +894,8 @@ static int snd_intel8x0m_ich_chip_init(struct intel8x0m *chip, int probing)
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/* finish cold or do warm reset */
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cnt |= (cnt & ICH_AC97COLD) == 0 ? ICH_AC97COLD : ICH_AC97WARM;
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iputdword(chip, ICHREG(GLOB_CNT), cnt);
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end_time = (jiffies + (HZ / 4)) + 1;
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usleep_range(500, 1000); /* give warm reset some time */
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end_time = jiffies + HZ / 4;
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do {
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if ((igetdword(chip, ICHREG(GLOB_CNT)) & ICH_AC97WARM) == 0)
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goto __ok;
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