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ARM: dts: sun8i: Add A23 usb-phy and otg nodes
Note these are added to the sun8i-a23.dtsi file rather then to the shared sun8i-a23-a33.dtsi file as both the phy and the otg controller on the a33 are slightly different. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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@ -58,6 +58,39 @@ mbus_clk: clk@01c2015c {
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clock-output-names = "mbus";
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clock-output-names = "mbus";
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};
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};
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};
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};
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soc@01c00000 {
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usb_otg: usb@01c19000 {
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compatible = "allwinner,sun6i-a31-musb";
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reg = <0x01c19000 0x0400>;
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clocks = <&ahb1_gates 24>;
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resets = <&ahb1_rst 24>;
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interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "mc";
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phys = <&usbphy 0>;
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phy-names = "usb";
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extcon = <&usbphy 0>;
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status = "disabled";
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};
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usbphy: phy@01c19400 {
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compatible = "allwinner,sun8i-a23-usb-phy";
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reg = <0x01c19400 0x10>,
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<0x01c1a800 0x4>;
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reg-names = "phy_ctrl",
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"pmu1";
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clocks = <&usb_clk 8>,
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<&usb_clk 9>;
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clock-names = "usb0_phy",
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"usb1_phy";
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resets = <&usb_clk 0>,
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<&usb_clk 1>;
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reset-names = "usb0_reset",
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"usb1_reset";
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status = "disabled";
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#phy-cells = <1>;
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};
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};
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};
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};
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&pio {
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&pio {
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