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drm/exynos: mixer: remove all static blending setup
Previously blending setup was static and most of it was done in mixer_win_reset(). Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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@ -401,11 +401,6 @@ static void mixer_cfg_layer(struct mixer_context *ctx, unsigned int win,
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mixer_reg_writemask(res, MXR_LAYER_CFG,
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MXR_LAYER_CFG_VP_VAL(priority),
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MXR_LAYER_CFG_VP_MASK);
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/* control blending of graphic layer 0 */
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mixer_reg_writemask(res, MXR_GRAPHIC_CFG(0), val,
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MXR_GRP_CFG_BLEND_PRE_MUL |
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MXR_GRP_CFG_PIXEL_BLEND_EN);
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}
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break;
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}
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@ -672,7 +667,6 @@ static void mixer_win_reset(struct mixer_context *ctx)
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{
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struct mixer_resources *res = &ctx->mixer_res;
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unsigned long flags;
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u32 val; /* value stored to register */
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spin_lock_irqsave(&res->reg_slock, flags);
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mixer_vsync_set_update(ctx, false);
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@ -694,23 +688,6 @@ static void mixer_win_reset(struct mixer_context *ctx)
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mixer_reg_write(res, MXR_BG_COLOR1, 0x008080);
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mixer_reg_write(res, MXR_BG_COLOR2, 0x008080);
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/* setting graphical layers */
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val = MXR_GRP_CFG_COLOR_KEY_DISABLE; /* no blank key */
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val |= MXR_GRP_CFG_WIN_BLEND_EN;
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val |= MXR_GRP_CFG_ALPHA_VAL(0xff); /* non-transparent alpha */
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/* Don't blend layer 0 onto the mixer background */
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mixer_reg_write(res, MXR_GRAPHIC_CFG(0), val);
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/* Blend layer 1 into layer 0 */
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val |= MXR_GRP_CFG_BLEND_PRE_MUL;
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val |= MXR_GRP_CFG_PIXEL_BLEND_EN;
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mixer_reg_write(res, MXR_GRAPHIC_CFG(1), val);
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/* setting video layers */
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val = MXR_GRP_CFG_ALPHA_VAL(0);
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mixer_reg_write(res, MXR_VIDEO_CFG, val);
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if (ctx->vp_enabled) {
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/* configuration of Video Processor Registers */
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vp_win_reset(ctx);
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