mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-19 01:07:09 +07:00
drm/i915: Do not wait atomically for display clocks
Looks like this code does not need to wait atomically since it otherwise takes the mutex. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1457015805-23742-1-git-send-email-tvrtko.ursulin@linux.intel.com
This commit is contained in:
parent
0351b93992
commit
5ba001783b
@ -9857,8 +9857,8 @@ static void broadwell_set_cdclk(struct drm_device *dev, int cdclk)
|
||||
val |= LCPLL_CD_SOURCE_FCLK;
|
||||
I915_WRITE(LCPLL_CTL, val);
|
||||
|
||||
if (wait_for_atomic_us(I915_READ(LCPLL_CTL) &
|
||||
LCPLL_CD_SOURCE_FCLK_DONE, 1))
|
||||
if (wait_for_us(I915_READ(LCPLL_CTL) &
|
||||
LCPLL_CD_SOURCE_FCLK_DONE, 1))
|
||||
DRM_ERROR("Switching to FCLK failed\n");
|
||||
|
||||
val = I915_READ(LCPLL_CTL);
|
||||
@ -9892,8 +9892,8 @@ static void broadwell_set_cdclk(struct drm_device *dev, int cdclk)
|
||||
val &= ~LCPLL_CD_SOURCE_FCLK;
|
||||
I915_WRITE(LCPLL_CTL, val);
|
||||
|
||||
if (wait_for_atomic_us((I915_READ(LCPLL_CTL) &
|
||||
LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1))
|
||||
if (wait_for_us((I915_READ(LCPLL_CTL) &
|
||||
LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1))
|
||||
DRM_ERROR("Switching back to LCPLL failed\n");
|
||||
|
||||
mutex_lock(&dev_priv->rps.hw_lock);
|
||||
|
Loading…
Reference in New Issue
Block a user