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ARM: kprobes: Decode 16-bit Thumb IT instruction
The normal Thumb singlestepping routine updates the IT state after calling the instruction handler. We don't what this to happen after the IT instruction simulation sets the IT state, therefore we need to provide a custom singlestep routine. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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@ -110,6 +110,37 @@ t16_simulate_cbz(struct kprobe *p, struct pt_regs *regs)
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}
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}
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static void __kprobes
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t16_simulate_it(struct kprobe *p, struct pt_regs *regs)
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{
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/*
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* The 8 IT state bits are split into two parts in CPSR:
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* ITSTATE<1:0> are in CPSR<26:25>
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* ITSTATE<7:2> are in CPSR<15:10>
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* The new IT state is in the lower byte of insn.
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*/
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kprobe_opcode_t insn = p->opcode;
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unsigned long cpsr = regs->ARM_cpsr;
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cpsr &= ~PSR_IT_MASK;
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cpsr |= (insn & 0xfc) << 8;
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cpsr |= (insn & 0x03) << 25;
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regs->ARM_cpsr = cpsr;
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}
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static void __kprobes
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t16_singlestep_it(struct kprobe *p, struct pt_regs *regs)
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{
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regs->ARM_pc += 2;
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t16_simulate_it(p, regs);
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}
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static enum kprobe_insn __kprobes
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t16_decode_it(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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{
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asi->insn_singlestep = t16_singlestep_it;
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return INSN_GOOD_NO_SLOT;
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}
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static unsigned long __kprobes
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t16_emulate_loregs(struct kprobe *p, struct pt_regs *regs)
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{
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@ -310,6 +341,8 @@ static const union decode_item t16_table_1011[] = {
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DECODE_SIMULATE (0xffcf, 0xbf00, kprobe_simulate_nop),
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/* Unassigned hints 1011 1111 xxxx 0000 */
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DECODE_REJECT (0xff0f, 0xbf00),
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/* IT 1011 1111 xxxx xxxx */
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DECODE_CUSTOM (0xff00, 0xbf00, t16_decode_it),
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DECODE_END
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};
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