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fpga: dfl: add feature device infrastructure
This patch abstracts the common operations of the sub features and defines the feature_ops data structure, including init, uinit and ioctl function pointers. And this patch adds some common helper functions for FME and AFU drivers, e.g. dfl_feature_dev_use_begin/end which are used to ensure exclusive usage of the feature device file. Signed-off-by: Tim Whisonant <tim.whisonant@intel.com> Signed-off-by: Enno Luebbers <enno.luebbers@intel.com> Signed-off-by: Shiva Rao <shiva.rao@intel.com> Signed-off-by: Christopher Rauer <christopher.rauer@intel.com> Signed-off-by: Kang Luwei <luwei.kang@intel.com> Signed-off-by: Zhang Yi <yi.z.zhang@intel.com> Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Signed-off-by: Wu Hao <hao.wu@intel.com> Acked-by: Alan Tull <atull@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -136,6 +136,77 @@ static enum dfl_id_type dfh_id_to_type(u32 id)
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return DFL_ID_MAX;
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}
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/**
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* dfl_fpga_dev_feature_uinit - uinit for sub features of dfl feature device
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* @pdev: feature device.
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*/
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void dfl_fpga_dev_feature_uinit(struct platform_device *pdev)
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{
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struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
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struct dfl_feature *feature;
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dfl_fpga_dev_for_each_feature(pdata, feature)
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if (feature->ops) {
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feature->ops->uinit(pdev, feature);
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feature->ops = NULL;
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}
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}
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EXPORT_SYMBOL_GPL(dfl_fpga_dev_feature_uinit);
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static int dfl_feature_instance_init(struct platform_device *pdev,
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struct dfl_feature_platform_data *pdata,
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struct dfl_feature *feature,
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struct dfl_feature_driver *drv)
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{
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int ret;
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ret = drv->ops->init(pdev, feature);
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if (ret)
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return ret;
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feature->ops = drv->ops;
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return ret;
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}
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/**
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* dfl_fpga_dev_feature_init - init for sub features of dfl feature device
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* @pdev: feature device.
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* @feature_drvs: drvs for sub features.
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*
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* This function will match sub features with given feature drvs list and
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* use matched drv to init related sub feature.
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*
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* Return: 0 on success, negative error code otherwise.
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*/
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int dfl_fpga_dev_feature_init(struct platform_device *pdev,
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struct dfl_feature_driver *feature_drvs)
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{
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struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
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struct dfl_feature_driver *drv = feature_drvs;
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struct dfl_feature *feature;
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int ret;
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while (drv->ops) {
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dfl_fpga_dev_for_each_feature(pdata, feature) {
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/* match feature and drv using id */
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if (feature->id == drv->id) {
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ret = dfl_feature_instance_init(pdev, pdata,
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feature, drv);
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if (ret)
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goto exit;
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}
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}
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drv++;
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}
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return 0;
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exit:
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dfl_fpga_dev_feature_uinit(pdev);
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return ret;
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}
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EXPORT_SYMBOL_GPL(dfl_fpga_dev_feature_init);
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static void dfl_chardev_uinit(void)
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{
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int i;
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@ -131,6 +131,17 @@
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#define PORT_CTRL_LATENCY BIT_ULL(2)
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#define PORT_CTRL_SFTRST_ACK BIT_ULL(4) /* HW ack for reset */
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/**
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* struct dfl_feature_driver - sub feature's driver
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*
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* @id: sub feature id.
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* @ops: ops of this sub feature.
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*/
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struct dfl_feature_driver {
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u64 id;
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const struct dfl_feature_ops *ops;
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};
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/**
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* struct dfl_feature - sub feature of the feature devices
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*
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@ -139,13 +150,17 @@
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* this index is used to find its mmio resource from the
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* feature dev (platform device)'s reources.
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* @ioaddr: mapped mmio resource address.
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* @ops: ops of this sub feature.
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*/
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struct dfl_feature {
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u64 id;
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int resource_index;
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void __iomem *ioaddr;
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const struct dfl_feature_ops *ops;
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};
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#define DEV_STATUS_IN_USE 0
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/**
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* struct dfl_feature_platform_data - platform data for feature devices
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*
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@ -156,6 +171,8 @@ struct dfl_feature {
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* @dfl_cdev: ptr to container device.
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* @disable_count: count for port disable.
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* @num: number for sub features.
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* @dev_status: dev status (e.g. DEV_STATUS_IN_USE).
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* @private: ptr to feature dev private data.
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* @features: sub features of this feature dev.
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*/
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struct dfl_feature_platform_data {
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@ -165,11 +182,49 @@ struct dfl_feature_platform_data {
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struct platform_device *dev;
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struct dfl_fpga_cdev *dfl_cdev;
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unsigned int disable_count;
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unsigned long dev_status;
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void *private;
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int num;
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struct dfl_feature features[0];
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};
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static inline
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int dfl_feature_dev_use_begin(struct dfl_feature_platform_data *pdata)
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{
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/* Test and set IN_USE flags to ensure file is exclusively used */
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if (test_and_set_bit_lock(DEV_STATUS_IN_USE, &pdata->dev_status))
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return -EBUSY;
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return 0;
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}
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static inline
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void dfl_feature_dev_use_end(struct dfl_feature_platform_data *pdata)
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{
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clear_bit_unlock(DEV_STATUS_IN_USE, &pdata->dev_status);
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}
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static inline
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void dfl_fpga_pdata_set_private(struct dfl_feature_platform_data *pdata,
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void *private)
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{
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pdata->private = private;
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}
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static inline
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void *dfl_fpga_pdata_get_private(struct dfl_feature_platform_data *pdata)
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{
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return pdata->private;
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}
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struct dfl_feature_ops {
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int (*init)(struct platform_device *pdev, struct dfl_feature *feature);
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void (*uinit)(struct platform_device *pdev,
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struct dfl_feature *feature);
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long (*ioctl)(struct platform_device *pdev, struct dfl_feature *feature,
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unsigned int cmd, unsigned long arg);
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};
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#define DFL_FPGA_FEATURE_DEV_FME "dfl-fme"
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#define DFL_FPGA_FEATURE_DEV_PORT "dfl-port"
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@ -179,11 +234,25 @@ static inline int dfl_feature_platform_data_size(const int num)
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num * sizeof(struct dfl_feature);
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}
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void dfl_fpga_dev_feature_uinit(struct platform_device *pdev);
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int dfl_fpga_dev_feature_init(struct platform_device *pdev,
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struct dfl_feature_driver *feature_drvs);
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int dfl_fpga_dev_ops_register(struct platform_device *pdev,
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const struct file_operations *fops,
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struct module *owner);
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void dfl_fpga_dev_ops_unregister(struct platform_device *pdev);
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static inline
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struct platform_device *dfl_fpga_inode_to_feature_dev(struct inode *inode)
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{
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struct dfl_feature_platform_data *pdata;
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pdata = container_of(inode->i_cdev, struct dfl_feature_platform_data,
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cdev);
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return pdata->dev;
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}
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#define dfl_fpga_dev_for_each_feature(pdata, feature) \
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for ((feature) = (pdata)->features; \
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(feature) < (pdata)->features + (pdata)->num; (feature)++)
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@ -213,6 +282,17 @@ void __iomem *dfl_get_feature_ioaddr_by_id(struct device *dev, u64 id)
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return NULL;
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}
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static inline bool is_dfl_feature_present(struct device *dev, u64 id)
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{
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return !!dfl_get_feature_ioaddr_by_id(dev, id);
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}
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static inline
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struct device *dfl_fpga_pdata_to_parent(struct dfl_feature_platform_data *pdata)
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{
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return pdata->dev->dev.parent->parent;
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}
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static inline bool dfl_feature_is_fme(void __iomem *base)
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{
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u64 v = readq(base + DFH);
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