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serial: cpm_uat: reducing CPM serial latency
Setting Rx FIFO size to 1 reduces reader process wakeup latency up to 20x for baud rates <= 9600. This patch sets the Rx FIFO size to 1 for baud rates <= 9600 or if low latency has been requested for the tty. Signed-off-by: Michael Trimarchi <michael@gandalf.sssup.it> Signed-off-by: Bruno Morelli <bruno@evidence.eu.com> Signed-off-by: Baurzhan Ismagulov <ibr@radix50.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -72,6 +72,8 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
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/**************************************************************/
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#define HW_BUF_SPD_THRESHOLD 9600
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/*
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* Check, if transmit buffers are processed
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*/
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@ -503,6 +505,11 @@ static void cpm_uart_set_termios(struct uart_port *port,
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pr_debug("CPM uart[%d]:set_termios\n", port->line);
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baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
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if (baud <= HW_BUF_SPD_THRESHOLD ||
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(pinfo->port.state && pinfo->port.state->port.tty->low_latency))
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pinfo->rx_fifosize = 1;
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else
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pinfo->rx_fifosize = RX_BUF_SIZE;
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/* Character length programmed into the mode register is the
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* sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
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@ -594,6 +601,17 @@ static void cpm_uart_set_termios(struct uart_port *port,
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*/
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bits++;
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if (IS_SMC(pinfo)) {
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/*
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* MRBLR can be changed while an SMC/SCC is operating only
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* if it is done in a single bus cycle with one 16-bit move
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* (not two 8-bit bus cycles back-to-back). This occurs when
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* the cp shifts control to the next RxBD, so the change does
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* not take effect immediately. To guarantee the exact RxBD
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* on which the change occurs, change MRBLR only while the
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* SMC/SCC receiver is disabled.
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*/
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out_be16(&pinfo->smcup->smc_mrblr, pinfo->rx_fifosize);
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/* Set the mode register. We want to keep a copy of the
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* enables, because we want to put them back if they were
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* present.
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@ -604,6 +622,7 @@ static void cpm_uart_set_termios(struct uart_port *port,
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out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits) | cval |
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SMCMR_SM_UART | prev_mode);
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} else {
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out_be16(&pinfo->sccup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
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out_be16(&sccp->scc_psmr, (sbits << 12) | scval);
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}
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