AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-12-28 11:18:45 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

clk: samsung: dt-bindings: Document Exynos5433 IMEM CMU

Browse Source 
Document DT bindings of the IMEM CMU providing clocks for the Exynos5433
Security SubSystem (SSS) and SlimSSS IPs.

Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com>
[s.nawrocki@samsung.com: edited commit description]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This commit is contained in:
Kamil Konieczny 2019-01-22 10:02:30 +01:00 committed by Sylwester Nawrocki
parent b80a40c659
commit 5af01ab3b6
1 changed files with 23 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
Documentation/devicetree/bindings/clock/exynos5433-clock.txt
View File

@ -50,6 +50,8 @@ Required Properties:
IPs. IPs.
- "samsung,exynos5433-cmu-cam1" - clock controller compatible for CMU_CAM1 - "samsung,exynos5433-cmu-cam1" - clock controller compatible for CMU_CAM1
which generates clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs. which generates clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs.
- "samsung,exynos5433-cmu-imem" - clock controller compatible for CMU_IMEM
which generates clocks for SSS (Security SubSystem) and SlimSSS IPs.
- reg: physical base address of the controller and length of memory mapped - reg: physical base address of the controller and length of memory mapped
region. region.
@ -168,6 +170,12 @@ Required Properties:
- aclk_cam1_400 - aclk_cam1_400
- aclk_cam1_552 - aclk_cam1_552
Input clocks for imem clock controller:
- oscclk
- aclk_imem_sssx_266
- aclk_imem_266
- aclk_imem_200
Optional properties: Optional properties:
- power-domains: a phandle to respective power domain node as described by - power-domains: a phandle to respective power domain node as described by
generic PM domain bindings (see power/power_domain.txt for more generic PM domain bindings (see power/power_domain.txt for more
@ -469,6 +477,21 @@ Example 2: Examples of clock controller nodes are listed below.
power-domains = <&pd_cam1>; power-domains = <&pd_cam1>;
}; };
cmu_imem: clock-controller@11060000 {
compatible = "samsung,exynos5433-cmu-imem";
reg = <0x11060000 0x1000>;
#clock-cells = <1>;
clock-names = "oscclk",
"aclk_imem_sssx_266",
"aclk_imem_266",
"aclk_imem_200";
clocks = <&xxti>,
<&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>,
<&cmu_top CLK_DIV_ACLK_IMEM_266>,
<&cmu_top CLK_DIV_ACLK_IMEM_200>;
};
Example 3: UART controller node that consumes the clock generated by the clock Example 3: UART controller node that consumes the clock generated by the clock
controller. controller.