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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ath9k_hw: Use a helper function to get MCI ISR
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -180,7 +180,6 @@ static bool ar9003_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked)
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u32 mask2 = 0;
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struct ath9k_hw_capabilities *pCap = &ah->caps;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
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u32 sync_cause = 0, async_cause;
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async_cause = REG_READ(ah, AR_INTR_ASYNC_CAUSE);
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@ -302,32 +301,8 @@ static bool ar9003_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked)
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ar9003_hw_bb_watchdog_read(ah);
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}
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if (async_cause & AR_INTR_ASYNC_MASK_MCI) {
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u32 raw_intr, rx_msg_intr;
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rx_msg_intr = REG_READ(ah, AR_MCI_INTERRUPT_RX_MSG_RAW);
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raw_intr = REG_READ(ah, AR_MCI_INTERRUPT_RAW);
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if ((raw_intr == 0xdeadbeef) || (rx_msg_intr == 0xdeadbeef))
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ath_dbg(common, MCI,
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"MCI gets 0xdeadbeef during MCI int processing new raw_intr=0x%08x, new rx_msg_raw=0x%08x, raw_intr=0x%08x, rx_msg_raw=0x%08x\n",
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raw_intr, rx_msg_intr, mci->raw_intr,
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mci->rx_msg_intr);
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else {
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mci->rx_msg_intr |= rx_msg_intr;
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mci->raw_intr |= raw_intr;
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*masked |= ATH9K_INT_MCI;
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if (rx_msg_intr & AR_MCI_INTERRUPT_RX_MSG_CONT_INFO)
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mci->cont_status =
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REG_READ(ah, AR_MCI_CONT_STATUS);
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REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_RAW, rx_msg_intr);
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REG_WRITE(ah, AR_MCI_INTERRUPT_RAW, raw_intr);
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ath_dbg(common, MCI, "AR_INTR_SYNC_MCI\n");
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}
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}
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if (async_cause & AR_INTR_ASYNC_MASK_MCI)
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ar9003_mci_get_isr(ah, masked);
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if (sync_cause) {
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if (sync_cause & AR_INTR_SYNC_RADM_CPL_TIMEOUT) {
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@ -412,6 +412,31 @@ void ar9003_mci_get_interrupt(struct ath_hw *ah, u32 *raw_intr,
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}
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EXPORT_SYMBOL(ar9003_mci_get_interrupt);
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void ar9003_mci_get_isr(struct ath_hw *ah, enum ath9k_int *masked)
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{
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
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u32 raw_intr, rx_msg_intr;
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rx_msg_intr = REG_READ(ah, AR_MCI_INTERRUPT_RX_MSG_RAW);
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raw_intr = REG_READ(ah, AR_MCI_INTERRUPT_RAW);
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if ((raw_intr == 0xdeadbeef) || (rx_msg_intr == 0xdeadbeef)) {
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ath_dbg(common, MCI,
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"MCI gets 0xdeadbeef during int processing\n");
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} else {
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mci->rx_msg_intr |= rx_msg_intr;
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mci->raw_intr |= raw_intr;
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*masked |= ATH9K_INT_MCI;
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if (rx_msg_intr & AR_MCI_INTERRUPT_RX_MSG_CONT_INFO)
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mci->cont_status = REG_READ(ah, AR_MCI_CONT_STATUS);
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REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_RAW, rx_msg_intr);
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REG_WRITE(ah, AR_MCI_INTERRUPT_RAW, raw_intr);
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}
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}
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void ar9003_mci_2g5g_changed(struct ath_hw *ah, bool is_2g)
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{
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struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
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@ -1231,6 +1231,7 @@ void ar9003_mci_send_lna_transfer(struct ath_hw *ah, bool wait_done);
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void ar9003_mci_sync_bt_state(struct ath_hw *ah);
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void ar9003_mci_get_interrupt(struct ath_hw *ah, u32 *raw_intr,
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u32 *rx_msg_intr);
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void ar9003_mci_get_isr(struct ath_hw *ah, enum ath9k_int *masked);
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#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
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static inline enum ath_btcoex_scheme
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