mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 02:36:42 +07:00
net/mlx4_en: Fill all counters under one call of stats lock
Before this patch, the stats_lock was acquired twice. In between the
locks Driver sent command to gather some more statistics (per priority
and counter statistics). If the stats lock was acquired by get
statistics NDO in between we would have report out of sync counters.
Fix this by collecting all stats from Firmware in advance and then
fill the Software structs under one lock.
Fixes: 0b131561a7
("net/mlx4_en: Add Flow control statistics display via ethtool")
Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com>
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
0bb9fc4f54
commit
5a1647c391
@ -188,7 +188,7 @@ int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset)
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struct net_device *dev = mdev->pndev[port];
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struct mlx4_en_priv *priv = netdev_priv(dev);
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struct net_device_stats *stats = &dev->stats;
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struct mlx4_cmd_mailbox *mailbox;
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struct mlx4_cmd_mailbox *mailbox, *mailbox_priority;
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u64 in_mod = reset << 8 | port;
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int err;
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int i, counter_index;
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@ -198,6 +198,13 @@ int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset)
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mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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mailbox_priority = mlx4_alloc_cmd_mailbox(mdev->dev);
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if (IS_ERR(mailbox_priority)) {
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mlx4_free_cmd_mailbox(mdev->dev, mailbox);
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return PTR_ERR(mailbox_priority);
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}
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err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, in_mod, 0,
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MLX4_CMD_DUMP_ETH_STATS, MLX4_CMD_TIME_CLASS_B,
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MLX4_CMD_NATIVE);
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@ -206,6 +213,28 @@ int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset)
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mlx4_en_stats = mailbox->buf;
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memset(&tmp_counter_stats, 0, sizeof(tmp_counter_stats));
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counter_index = mlx4_get_default_counter_index(mdev->dev, port);
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err = mlx4_get_counter_stats(mdev->dev, counter_index,
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&tmp_counter_stats, reset);
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/* 0xffs indicates invalid value */
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memset(mailbox_priority->buf, 0xff,
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sizeof(*flowstats) * MLX4_NUM_PRIORITIES);
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if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN) {
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memset(mailbox_priority->buf, 0,
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sizeof(*flowstats) * MLX4_NUM_PRIORITIES);
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err = mlx4_cmd_box(mdev->dev, 0, mailbox_priority->dma,
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in_mod | MLX4_DUMP_ETH_STATS_FLOW_CONTROL,
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0, MLX4_CMD_DUMP_ETH_STATS,
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MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
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if (err)
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goto out;
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}
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flowstats = mailbox_priority->buf;
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spin_lock_bh(&priv->stats_lock);
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mlx4_en_fold_software_stats(dev);
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@ -345,31 +374,6 @@ int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset)
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priv->pkstats.tx_prio[8][0] = be64_to_cpu(mlx4_en_stats->TTOT_novlan);
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priv->pkstats.tx_prio[8][1] = be64_to_cpu(mlx4_en_stats->TOCT_novlan);
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spin_unlock_bh(&priv->stats_lock);
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memset(&tmp_counter_stats, 0, sizeof(tmp_counter_stats));
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counter_index = mlx4_get_default_counter_index(mdev->dev, port);
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err = mlx4_get_counter_stats(mdev->dev, counter_index,
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&tmp_counter_stats, reset);
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/* 0xffs indicates invalid value */
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memset(mailbox->buf, 0xff, sizeof(*flowstats) * MLX4_NUM_PRIORITIES);
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if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN) {
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memset(mailbox->buf, 0,
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sizeof(*flowstats) * MLX4_NUM_PRIORITIES);
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err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma,
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in_mod | MLX4_DUMP_ETH_STATS_FLOW_CONTROL,
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0, MLX4_CMD_DUMP_ETH_STATS,
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MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
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if (err)
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goto out;
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}
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flowstats = mailbox->buf;
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spin_lock_bh(&priv->stats_lock);
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if (tmp_counter_stats.counter_mode == 0) {
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priv->pf_stats.rx_bytes = be64_to_cpu(tmp_counter_stats.rx_bytes);
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priv->pf_stats.tx_bytes = be64_to_cpu(tmp_counter_stats.tx_bytes);
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@ -410,6 +414,7 @@ int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset)
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out:
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mlx4_free_cmd_mailbox(mdev->dev, mailbox);
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mlx4_free_cmd_mailbox(mdev->dev, mailbox_priority);
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return err;
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}
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